LCOV - code coverage report

Current view: top level - disco - fd_clock_tile.h (source / functions) Hit Total Coverage Test: cov.lcov Lines: 40 50 80.0 % Date: 2026-11-12 04:25:03 Functions: 20 648 3.1 %

Function Name	Hit count
backtest.c:fd_clock_tile_init	0
backtest.c:fd_clock_tile_now	0
backtest.c:fd_clock_tile_recal	0
backtest.c:fd_clock_tile_recal_due	0
backtest.c:fd_clock_tile_recal_next	0
backtest.c:fd_clock_tile_set	0
backtest.c:fd_clock_tile_tickcomp_to_wallclock	0
backtest.c:fd_clock_tile_tickcount_to_wallclock	0
backtest.c:fd_clock_tile_wallclock_to_tickcount	0
dump.c:fd_clock_tile_init	0
dump.c:fd_clock_tile_now	0
dump.c:fd_clock_tile_recal	0
dump.c:fd_clock_tile_recal_due	0
dump.c:fd_clock_tile_recal_next	0
dump.c:fd_clock_tile_set	0
dump.c:fd_clock_tile_tickcomp_to_wallclock	0
dump.c:fd_clock_tile_tickcount_to_wallclock	0
dump.c:fd_clock_tile_wallclock_to_tickcount	0
fd_backtest_tile.c:fd_clock_tile_init	0
fd_backtest_tile.c:fd_clock_tile_now	0
fd_backtest_tile.c:fd_clock_tile_recal	0
fd_backtest_tile.c:fd_clock_tile_recal_due	0
fd_backtest_tile.c:fd_clock_tile_recal_next	0
fd_backtest_tile.c:fd_clock_tile_set	0
fd_backtest_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_backtest_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_backtest_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_bencho.c:fd_clock_tile_init	0
fd_bencho.c:fd_clock_tile_now	0
fd_bencho.c:fd_clock_tile_recal	0
fd_bencho.c:fd_clock_tile_recal_due	0
fd_bencho.c:fd_clock_tile_recal_next	0
fd_bencho.c:fd_clock_tile_set	0
fd_bencho.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_bencho.c:fd_clock_tile_tickcount_to_wallclock	0
fd_bencho.c:fd_clock_tile_wallclock_to_tickcount	0
fd_benchs.c:fd_clock_tile_init	0
fd_benchs.c:fd_clock_tile_now	0
fd_benchs.c:fd_clock_tile_recal	0
fd_benchs.c:fd_clock_tile_recal_due	0
fd_benchs.c:fd_clock_tile_recal_next	0
fd_benchs.c:fd_clock_tile_set	0
fd_benchs.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_benchs.c:fd_clock_tile_tickcount_to_wallclock	0
fd_benchs.c:fd_clock_tile_wallclock_to_tickcount	0
fd_bundle_client.c:fd_clock_tile_init	0
fd_bundle_client.c:fd_clock_tile_now	0
fd_bundle_client.c:fd_clock_tile_recal	0
fd_bundle_client.c:fd_clock_tile_recal_due	0
fd_bundle_client.c:fd_clock_tile_recal_next	0
fd_bundle_client.c:fd_clock_tile_set	0
fd_bundle_client.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_bundle_client.c:fd_clock_tile_tickcount_to_wallclock	0
fd_bundle_client.c:fd_clock_tile_wallclock_to_tickcount	0
fd_bundle_tile.c:fd_clock_tile_init	0
fd_bundle_tile.c:fd_clock_tile_now	0
fd_bundle_tile.c:fd_clock_tile_recal	0
fd_bundle_tile.c:fd_clock_tile_recal_due	0
fd_bundle_tile.c:fd_clock_tile_recal_next	0
fd_bundle_tile.c:fd_clock_tile_set	0
fd_bundle_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_bundle_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_bundle_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_dedup_tile.c:fd_clock_tile_init	0
fd_dedup_tile.c:fd_clock_tile_now	0
fd_dedup_tile.c:fd_clock_tile_recal	0
fd_dedup_tile.c:fd_clock_tile_recal_due	0
fd_dedup_tile.c:fd_clock_tile_recal_next	0
fd_dedup_tile.c:fd_clock_tile_set	0
fd_dedup_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_dedup_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_dedup_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_diag_tile.c:fd_clock_tile_init	0
fd_diag_tile.c:fd_clock_tile_now	0
fd_diag_tile.c:fd_clock_tile_recal	0
fd_diag_tile.c:fd_clock_tile_recal_due	0
fd_diag_tile.c:fd_clock_tile_recal_next	0
fd_diag_tile.c:fd_clock_tile_set	0
fd_diag_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_diag_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_diag_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_event_tile.c:fd_clock_tile_init	0
fd_event_tile.c:fd_clock_tile_now	0
fd_event_tile.c:fd_clock_tile_recal	0
fd_event_tile.c:fd_clock_tile_recal_due	0
fd_event_tile.c:fd_clock_tile_recal_next	0
fd_event_tile.c:fd_clock_tile_set	0
fd_event_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_event_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_event_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_genesi_tile.c:fd_clock_tile_init	0
fd_genesi_tile.c:fd_clock_tile_now	0
fd_genesi_tile.c:fd_clock_tile_recal	0
fd_genesi_tile.c:fd_clock_tile_recal_due	0
fd_genesi_tile.c:fd_clock_tile_recal_next	0
fd_genesi_tile.c:fd_clock_tile_set	0
fd_genesi_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_genesi_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_genesi_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gossip_tile.c:fd_clock_tile_init	0
fd_gossip_tile.c:fd_clock_tile_now	0
fd_gossip_tile.c:fd_clock_tile_recal	0
fd_gossip_tile.c:fd_clock_tile_recal_due	0
fd_gossip_tile.c:fd_clock_tile_recal_next	0
fd_gossip_tile.c:fd_clock_tile_set	0
fd_gossip_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gossip_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gossip_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gossvf_tile.c:fd_clock_tile_init	0
fd_gossvf_tile.c:fd_clock_tile_now	0
fd_gossvf_tile.c:fd_clock_tile_recal	0
fd_gossvf_tile.c:fd_clock_tile_recal_due	0
fd_gossvf_tile.c:fd_clock_tile_recal_next	0
fd_gossvf_tile.c:fd_clock_tile_set	0
fd_gossvf_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gossvf_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gossvf_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui.c:fd_clock_tile_init	0
fd_gui.c:fd_clock_tile_now	0
fd_gui.c:fd_clock_tile_recal	0
fd_gui.c:fd_clock_tile_recal_due	0
fd_gui.c:fd_clock_tile_recal_next	0
fd_gui.c:fd_clock_tile_set	0
fd_gui.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui_hist.c:fd_clock_tile_init	0
fd_gui_hist.c:fd_clock_tile_now	0
fd_gui_hist.c:fd_clock_tile_recal	0
fd_gui_hist.c:fd_clock_tile_recal_due	0
fd_gui_hist.c:fd_clock_tile_recal_next	0
fd_gui_hist.c:fd_clock_tile_set	0
fd_gui_hist.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui_hist.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui_hist.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui_peers.c:fd_clock_tile_init	0
fd_gui_peers.c:fd_clock_tile_now	0
fd_gui_peers.c:fd_clock_tile_recal	0
fd_gui_peers.c:fd_clock_tile_recal_due	0
fd_gui_peers.c:fd_clock_tile_recal_next	0
fd_gui_peers.c:fd_clock_tile_set	0
fd_gui_peers.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui_peers.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui_peers.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui_printf.c:fd_clock_tile_init	0
fd_gui_printf.c:fd_clock_tile_now	0
fd_gui_printf.c:fd_clock_tile_recal	0
fd_gui_printf.c:fd_clock_tile_recal_due	0
fd_gui_printf.c:fd_clock_tile_recal_next	0
fd_gui_printf.c:fd_clock_tile_set	0
fd_gui_printf.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui_printf.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui_printf.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui_shred.c:fd_clock_tile_init	0
fd_gui_shred.c:fd_clock_tile_now	0
fd_gui_shred.c:fd_clock_tile_recal	0
fd_gui_shred.c:fd_clock_tile_recal_due	0
fd_gui_shred.c:fd_clock_tile_recal_next	0
fd_gui_shred.c:fd_clock_tile_set	0
fd_gui_shred.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui_shred.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui_shred.c:fd_clock_tile_wallclock_to_tickcount	0
fd_gui_tile.c:fd_clock_tile_init	0
fd_gui_tile.c:fd_clock_tile_now	0
fd_gui_tile.c:fd_clock_tile_recal	0
fd_gui_tile.c:fd_clock_tile_recal_due	0
fd_gui_tile.c:fd_clock_tile_recal_next	0
fd_gui_tile.c:fd_clock_tile_set	0
fd_gui_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_gui_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_gui_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_ipecho_tile.c:fd_clock_tile_init	0
fd_ipecho_tile.c:fd_clock_tile_now	0
fd_ipecho_tile.c:fd_clock_tile_recal	0
fd_ipecho_tile.c:fd_clock_tile_recal_due	0
fd_ipecho_tile.c:fd_clock_tile_recal_next	0
fd_ipecho_tile.c:fd_clock_tile_set	0
fd_ipecho_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_ipecho_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_ipecho_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_motor_tile.c:fd_clock_tile_init	0
fd_motor_tile.c:fd_clock_tile_now	0
fd_motor_tile.c:fd_clock_tile_recal	0
fd_motor_tile.c:fd_clock_tile_recal_due	0
fd_motor_tile.c:fd_clock_tile_recal_next	0
fd_motor_tile.c:fd_clock_tile_set	0
fd_motor_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_motor_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_motor_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_pack_tile.c:fd_clock_tile_init	0
fd_pack_tile.c:fd_clock_tile_now	0
fd_pack_tile.c:fd_clock_tile_recal	0
fd_pack_tile.c:fd_clock_tile_recal_due	0
fd_pack_tile.c:fd_clock_tile_recal_next	0
fd_pack_tile.c:fd_clock_tile_set	0
fd_pack_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_pack_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_pack_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_quic_tile.c:fd_clock_tile_init	0
fd_quic_tile.c:fd_clock_tile_now	0
fd_quic_tile.c:fd_clock_tile_recal	0
fd_quic_tile.c:fd_clock_tile_recal_due	0
fd_quic_tile.c:fd_clock_tile_recal_next	0
fd_quic_tile.c:fd_clock_tile_set	0
fd_quic_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_quic_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_quic_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_quic_trace_frame.c:fd_clock_tile_init	0
fd_quic_trace_frame.c:fd_clock_tile_now	0
fd_quic_trace_frame.c:fd_clock_tile_recal	0
fd_quic_trace_frame.c:fd_clock_tile_recal_due	0
fd_quic_trace_frame.c:fd_clock_tile_recal_next	0
fd_quic_trace_frame.c:fd_clock_tile_set	0
fd_quic_trace_frame.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_quic_trace_frame.c:fd_clock_tile_tickcount_to_wallclock	0
fd_quic_trace_frame.c:fd_clock_tile_wallclock_to_tickcount	0
fd_quic_trace_log_tile.c:fd_clock_tile_init	0
fd_quic_trace_log_tile.c:fd_clock_tile_now	0
fd_quic_trace_log_tile.c:fd_clock_tile_recal	0
fd_quic_trace_log_tile.c:fd_clock_tile_recal_due	0
fd_quic_trace_log_tile.c:fd_clock_tile_recal_next	0
fd_quic_trace_log_tile.c:fd_clock_tile_set	0
fd_quic_trace_log_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_quic_trace_log_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_quic_trace_log_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_quic_trace_main.c:fd_clock_tile_init	0
fd_quic_trace_main.c:fd_clock_tile_now	0
fd_quic_trace_main.c:fd_clock_tile_recal	0
fd_quic_trace_main.c:fd_clock_tile_recal_due	0
fd_quic_trace_main.c:fd_clock_tile_recal_next	0
fd_quic_trace_main.c:fd_clock_tile_set	0
fd_quic_trace_main.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_quic_trace_main.c:fd_clock_tile_tickcount_to_wallclock	0
fd_quic_trace_main.c:fd_clock_tile_wallclock_to_tickcount	0
fd_quic_trace_rx_tile.c:fd_clock_tile_init	0
fd_quic_trace_rx_tile.c:fd_clock_tile_now	0
fd_quic_trace_rx_tile.c:fd_clock_tile_recal	0
fd_quic_trace_rx_tile.c:fd_clock_tile_recal_due	0
fd_quic_trace_rx_tile.c:fd_clock_tile_recal_next	0
fd_quic_trace_rx_tile.c:fd_clock_tile_set	0
fd_quic_trace_rx_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_quic_trace_rx_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_quic_trace_rx_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_repair_tile.c:fd_clock_tile_init	0
fd_repair_tile.c:fd_clock_tile_now	0
fd_repair_tile.c:fd_clock_tile_recal	0
fd_repair_tile.c:fd_clock_tile_recal_due	0
fd_repair_tile.c:fd_clock_tile_recal_next	0
fd_repair_tile.c:fd_clock_tile_set	0
fd_repair_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_repair_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_repair_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_replay_tile.c:fd_clock_tile_init	0
fd_replay_tile.c:fd_clock_tile_now	0
fd_replay_tile.c:fd_clock_tile_recal	0
fd_replay_tile.c:fd_clock_tile_recal_due	0
fd_replay_tile.c:fd_clock_tile_recal_next	0
fd_replay_tile.c:fd_clock_tile_set	0
fd_replay_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_replay_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_replay_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_resolv_tile.c:fd_clock_tile_init	0
fd_resolv_tile.c:fd_clock_tile_now	0
fd_resolv_tile.c:fd_clock_tile_recal	0
fd_resolv_tile.c:fd_clock_tile_recal_due	0
fd_resolv_tile.c:fd_clock_tile_recal_next	0
fd_resolv_tile.c:fd_clock_tile_set	0
fd_resolv_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_resolv_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_resolv_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_rpc_tile.c:fd_clock_tile_init	0
fd_rpc_tile.c:fd_clock_tile_now	0
fd_rpc_tile.c:fd_clock_tile_recal	0
fd_rpc_tile.c:fd_clock_tile_recal_due	0
fd_rpc_tile.c:fd_clock_tile_recal_next	0
fd_rpc_tile.c:fd_clock_tile_set	0
fd_rpc_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_rpc_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_rpc_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_sched.c:fd_clock_tile_init	0
fd_sched.c:fd_clock_tile_now	0
fd_sched.c:fd_clock_tile_recal	0
fd_sched.c:fd_clock_tile_recal_due	0
fd_sched.c:fd_clock_tile_recal_next	0
fd_sched.c:fd_clock_tile_set	0
fd_sched.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_sched.c:fd_clock_tile_tickcount_to_wallclock	0
fd_sched.c:fd_clock_tile_wallclock_to_tickcount	0
fd_shred_harness.c:fd_clock_tile_init	0
fd_shred_harness.c:fd_clock_tile_now	0
fd_shred_harness.c:fd_clock_tile_recal	0
fd_shred_harness.c:fd_clock_tile_recal_due	0
fd_shred_harness.c:fd_clock_tile_recal_next	0
fd_shred_harness.c:fd_clock_tile_set	0
fd_shred_harness.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_shred_harness.c:fd_clock_tile_tickcount_to_wallclock	0
fd_shred_harness.c:fd_clock_tile_wallclock_to_tickcount	0
fd_shred_tile.c:fd_clock_tile_init	0
fd_shred_tile.c:fd_clock_tile_now	0
fd_shred_tile.c:fd_clock_tile_recal	0
fd_shred_tile.c:fd_clock_tile_recal_due	0
fd_shred_tile.c:fd_clock_tile_recal_next	0
fd_shred_tile.c:fd_clock_tile_set	0
fd_shred_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_shred_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_shred_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_snapct_tile.c:fd_clock_tile_init	0
fd_snapct_tile.c:fd_clock_tile_now	0
fd_snapct_tile.c:fd_clock_tile_recal	0
fd_snapct_tile.c:fd_clock_tile_recal_due	0
fd_snapct_tile.c:fd_clock_tile_recal_next	0
fd_snapct_tile.c:fd_clock_tile_set	0
fd_snapct_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_snapct_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_snapct_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_snapld_tile.c:fd_clock_tile_init	0
fd_snapld_tile.c:fd_clock_tile_now	0
fd_snapld_tile.c:fd_clock_tile_recal	0
fd_snapld_tile.c:fd_clock_tile_recal_due	0
fd_snapld_tile.c:fd_clock_tile_recal_next	0
fd_snapld_tile.c:fd_clock_tile_set	0
fd_snapld_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_snapld_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_snapld_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_snapmk_tile.c:fd_clock_tile_init	0
fd_snapmk_tile.c:fd_clock_tile_now	0
fd_snapmk_tile.c:fd_clock_tile_recal	0
fd_snapmk_tile.c:fd_clock_tile_recal_due	0
fd_snapmk_tile.c:fd_clock_tile_recal_next	0
fd_snapmk_tile.c:fd_clock_tile_set	0
fd_snapmk_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_snapmk_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_snapmk_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_snapsv_tile.c:fd_clock_tile_init	0
fd_snapsv_tile.c:fd_clock_tile_now	0
fd_snapsv_tile.c:fd_clock_tile_recal	0
fd_snapsv_tile.c:fd_clock_tile_recal_due	0
fd_snapsv_tile.c:fd_clock_tile_recal_next	0
fd_snapsv_tile.c:fd_clock_tile_set	0
fd_snapsv_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_snapsv_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_snapsv_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fd_votor_tile.c:fd_clock_tile_init	0
fd_votor_tile.c:fd_clock_tile_now	0
fd_votor_tile.c:fd_clock_tile_recal	0
fd_votor_tile.c:fd_clock_tile_recal_due	0
fd_votor_tile.c:fd_clock_tile_recal_next	0
fd_votor_tile.c:fd_clock_tile_set	0
fd_votor_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fd_votor_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fd_votor_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_bundle_client.c:fd_clock_tile_init	0
fuzz_bundle_client.c:fd_clock_tile_now	0
fuzz_bundle_client.c:fd_clock_tile_recal	0
fuzz_bundle_client.c:fd_clock_tile_recal_due	0
fuzz_bundle_client.c:fd_clock_tile_recal_next	0
fuzz_bundle_client.c:fd_clock_tile_set	0
fuzz_bundle_client.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_bundle_client.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_bundle_client.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_init	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_now	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_recal	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_recal_due	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_recal_next	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_set	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_gossvf_gossip_pair.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_gossvf_tile.c:fd_clock_tile_init	0
fuzz_gossvf_tile.c:fd_clock_tile_now	0
fuzz_gossvf_tile.c:fd_clock_tile_recal	0
fuzz_gossvf_tile.c:fd_clock_tile_recal_due	0
fuzz_gossvf_tile.c:fd_clock_tile_recal_next	0
fuzz_gossvf_tile.c:fd_clock_tile_set	0
fuzz_gossvf_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_gossvf_tile.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_gossvf_tile.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_rpc.c:fd_clock_tile_init	0
fuzz_rpc.c:fd_clock_tile_now	0
fuzz_rpc.c:fd_clock_tile_recal	0
fuzz_rpc.c:fd_clock_tile_recal_due	0
fuzz_rpc.c:fd_clock_tile_recal_next	0
fuzz_rpc.c:fd_clock_tile_set	0
fuzz_rpc.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_rpc.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_rpc.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_rpc_tarball.c:fd_clock_tile_init	0
fuzz_rpc_tarball.c:fd_clock_tile_now	0
fuzz_rpc_tarball.c:fd_clock_tile_recal	0
fuzz_rpc_tarball.c:fd_clock_tile_recal_due	0
fuzz_rpc_tarball.c:fd_clock_tile_recal_next	0
fuzz_rpc_tarball.c:fd_clock_tile_set	0
fuzz_rpc_tarball.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_rpc_tarball.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_rpc_tarball.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_sched_rdisp.c:fd_clock_tile_init	0
fuzz_sched_rdisp.c:fd_clock_tile_now	0
fuzz_sched_rdisp.c:fd_clock_tile_recal	0
fuzz_sched_rdisp.c:fd_clock_tile_recal_due	0
fuzz_sched_rdisp.c:fd_clock_tile_recal_next	0
fuzz_sched_rdisp.c:fd_clock_tile_set	0
fuzz_sched_rdisp.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_sched_rdisp.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_sched_rdisp.c:fd_clock_tile_wallclock_to_tickcount	0
fuzz_votor_quic.c:fd_clock_tile_init	72
fuzz_votor_quic.c:fd_clock_tile_now	288
fuzz_votor_quic.c:fd_clock_tile_recal	0
fuzz_votor_quic.c:fd_clock_tile_recal_due	0
fuzz_votor_quic.c:fd_clock_tile_recal_next	0
fuzz_votor_quic.c:fd_clock_tile_set	0
fuzz_votor_quic.c:fd_clock_tile_tickcomp_to_wallclock	0
fuzz_votor_quic.c:fd_clock_tile_tickcount_to_wallclock	0
fuzz_votor_quic.c:fd_clock_tile_wallclock_to_tickcount	0
gossip.c:fd_clock_tile_init	0
gossip.c:fd_clock_tile_now	0
gossip.c:fd_clock_tile_recal	0
gossip.c:fd_clock_tile_recal_due	0
gossip.c:fd_clock_tile_recal_next	0
gossip.c:fd_clock_tile_set	0
gossip.c:fd_clock_tile_tickcomp_to_wallclock	0
gossip.c:fd_clock_tile_tickcount_to_wallclock	0
gossip.c:fd_clock_tile_wallclock_to_tickcount	0
gossip_dump.c:fd_clock_tile_init	0
gossip_dump.c:fd_clock_tile_now	0
gossip_dump.c:fd_clock_tile_recal	0
gossip_dump.c:fd_clock_tile_recal_due	0
gossip_dump.c:fd_clock_tile_recal_next	0
gossip_dump.c:fd_clock_tile_set	0
gossip_dump.c:fd_clock_tile_tickcomp_to_wallclock	0
gossip_dump.c:fd_clock_tile_tickcount_to_wallclock	0
gossip_dump.c:fd_clock_tile_wallclock_to_tickcount	0
monitor_gossip.c:fd_clock_tile_init	0
monitor_gossip.c:fd_clock_tile_now	0
monitor_gossip.c:fd_clock_tile_recal	0
monitor_gossip.c:fd_clock_tile_recal_due	0
monitor_gossip.c:fd_clock_tile_recal_next	0
monitor_gossip.c:fd_clock_tile_set	0
monitor_gossip.c:fd_clock_tile_tickcomp_to_wallclock	0
monitor_gossip.c:fd_clock_tile_tickcount_to_wallclock	0
monitor_gossip.c:fd_clock_tile_wallclock_to_tickcount	0
test_bundle_client.c:fd_clock_tile_init	0
test_bundle_client.c:fd_clock_tile_now	0
test_bundle_client.c:fd_clock_tile_recal	0
test_bundle_client.c:fd_clock_tile_recal_due	0
test_bundle_client.c:fd_clock_tile_recal_next	0
test_bundle_client.c:fd_clock_tile_set	0
test_bundle_client.c:fd_clock_tile_tickcomp_to_wallclock	0
test_bundle_client.c:fd_clock_tile_tickcount_to_wallclock	0
test_bundle_client.c:fd_clock_tile_wallclock_to_tickcount	0
test_bundle_client_wraparound.c:fd_clock_tile_init	0
test_bundle_client_wraparound.c:fd_clock_tile_now	0
test_bundle_client_wraparound.c:fd_clock_tile_recal	0
test_bundle_client_wraparound.c:fd_clock_tile_recal_due	0
test_bundle_client_wraparound.c:fd_clock_tile_recal_next	0
test_bundle_client_wraparound.c:fd_clock_tile_set	0
test_bundle_client_wraparound.c:fd_clock_tile_tickcomp_to_wallclock	0
test_bundle_client_wraparound.c:fd_clock_tile_tickcount_to_wallclock	0
test_bundle_client_wraparound.c:fd_clock_tile_wallclock_to_tickcount	0
test_bundle_tile.c:fd_clock_tile_init	0
test_bundle_tile.c:fd_clock_tile_now	0
test_bundle_tile.c:fd_clock_tile_recal	0
test_bundle_tile.c:fd_clock_tile_recal_due	0
test_bundle_tile.c:fd_clock_tile_recal_next	0
test_bundle_tile.c:fd_clock_tile_set	0
test_bundle_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_bundle_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_bundle_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_gossip_tile.c:fd_clock_tile_init	3
test_gossip_tile.c:fd_clock_tile_now	3
test_gossip_tile.c:fd_clock_tile_recal	0
test_gossip_tile.c:fd_clock_tile_recal_due	0
test_gossip_tile.c:fd_clock_tile_recal_next	0
test_gossip_tile.c:fd_clock_tile_set	0
test_gossip_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_gossip_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_gossip_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_gui_hist_evict.c:fd_clock_tile_init	0
test_gui_hist_evict.c:fd_clock_tile_now	0
test_gui_hist_evict.c:fd_clock_tile_recal	0
test_gui_hist_evict.c:fd_clock_tile_recal_due	0
test_gui_hist_evict.c:fd_clock_tile_recal_next	0
test_gui_hist_evict.c:fd_clock_tile_set	0
test_gui_hist_evict.c:fd_clock_tile_tickcomp_to_wallclock	0
test_gui_hist_evict.c:fd_clock_tile_tickcount_to_wallclock	0
test_gui_hist_evict.c:fd_clock_tile_wallclock_to_tickcount	0
test_gui_printf.c:fd_clock_tile_init	0
test_gui_printf.c:fd_clock_tile_now	0
test_gui_printf.c:fd_clock_tile_recal	0
test_gui_printf.c:fd_clock_tile_recal_due	0
test_gui_printf.c:fd_clock_tile_recal_next	0
test_gui_printf.c:fd_clock_tile_set	0
test_gui_printf.c:fd_clock_tile_tickcomp_to_wallclock	0
test_gui_printf.c:fd_clock_tile_tickcount_to_wallclock	0
test_gui_printf.c:fd_clock_tile_wallclock_to_tickcount	0
test_gui_tile.c:fd_clock_tile_init	0
test_gui_tile.c:fd_clock_tile_now	0
test_gui_tile.c:fd_clock_tile_recal	0
test_gui_tile.c:fd_clock_tile_recal_due	0
test_gui_tile.c:fd_clock_tile_recal_next	0
test_gui_tile.c:fd_clock_tile_set	0
test_gui_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_gui_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_gui_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_motor_tile.c:fd_clock_tile_init	0
test_motor_tile.c:fd_clock_tile_now	0
test_motor_tile.c:fd_clock_tile_recal	0
test_motor_tile.c:fd_clock_tile_recal_due	0
test_motor_tile.c:fd_clock_tile_recal_next	0
test_motor_tile.c:fd_clock_tile_set	0
test_motor_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_motor_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_motor_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_quic_bw.c:fd_clock_tile_init	3
test_quic_bw.c:fd_clock_tile_now	26820609
test_quic_bw.c:fd_clock_tile_recal	0
test_quic_bw.c:fd_clock_tile_recal_due	0
test_quic_bw.c:fd_clock_tile_recal_next	0
test_quic_bw.c:fd_clock_tile_set	0
test_quic_bw.c:fd_clock_tile_tickcomp_to_wallclock	0
test_quic_bw.c:fd_clock_tile_tickcount_to_wallclock	0
test_quic_bw.c:fd_clock_tile_wallclock_to_tickcount	0
test_quic_client_flood.c:fd_clock_tile_init	0
test_quic_client_flood.c:fd_clock_tile_now	0
test_quic_client_flood.c:fd_clock_tile_recal	0
test_quic_client_flood.c:fd_clock_tile_recal_due	0
test_quic_client_flood.c:fd_clock_tile_recal_next	0
test_quic_client_flood.c:fd_clock_tile_set	0
test_quic_client_flood.c:fd_clock_tile_tickcomp_to_wallclock	0
test_quic_client_flood.c:fd_clock_tile_tickcount_to_wallclock	0
test_quic_client_flood.c:fd_clock_tile_wallclock_to_tickcount	0
test_quic_concurrency.c:fd_clock_tile_init	3
test_quic_concurrency.c:fd_clock_tile_now	263381330
test_quic_concurrency.c:fd_clock_tile_recal	0
test_quic_concurrency.c:fd_clock_tile_recal_due	0
test_quic_concurrency.c:fd_clock_tile_recal_next	0
test_quic_concurrency.c:fd_clock_tile_set	0
test_quic_concurrency.c:fd_clock_tile_tickcomp_to_wallclock	0
test_quic_concurrency.c:fd_clock_tile_tickcount_to_wallclock	0
test_quic_concurrency.c:fd_clock_tile_wallclock_to_tickcount	0
test_quic_server.c:fd_clock_tile_init	0
test_quic_server.c:fd_clock_tile_now	0
test_quic_server.c:fd_clock_tile_recal	0
test_quic_server.c:fd_clock_tile_recal_due	0
test_quic_server.c:fd_clock_tile_recal_next	0
test_quic_server.c:fd_clock_tile_set	0
test_quic_server.c:fd_clock_tile_tickcomp_to_wallclock	0
test_quic_server.c:fd_clock_tile_tickcount_to_wallclock	0
test_quic_server.c:fd_clock_tile_wallclock_to_tickcount	0
test_replay_tile.c:fd_clock_tile_init	0
test_replay_tile.c:fd_clock_tile_now	0
test_replay_tile.c:fd_clock_tile_recal	0
test_replay_tile.c:fd_clock_tile_recal_due	0
test_replay_tile.c:fd_clock_tile_recal_next	0
test_replay_tile.c:fd_clock_tile_set	0
test_replay_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_replay_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_replay_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_resolv_tile.c:fd_clock_tile_init	0
test_resolv_tile.c:fd_clock_tile_now	0
test_resolv_tile.c:fd_clock_tile_recal	0
test_resolv_tile.c:fd_clock_tile_recal_due	0
test_resolv_tile.c:fd_clock_tile_recal_next	0
test_resolv_tile.c:fd_clock_tile_set	0
test_resolv_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_resolv_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_resolv_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_rpc_tile.c:fd_clock_tile_init	0
test_rpc_tile.c:fd_clock_tile_now	0
test_rpc_tile.c:fd_clock_tile_recal	0
test_rpc_tile.c:fd_clock_tile_recal_due	0
test_rpc_tile.c:fd_clock_tile_recal_next	0
test_rpc_tile.c:fd_clock_tile_set	0
test_rpc_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_rpc_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_rpc_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_sched.c:fd_clock_tile_init	0
test_sched.c:fd_clock_tile_now	0
test_sched.c:fd_clock_tile_recal	0
test_sched.c:fd_clock_tile_recal_due	0
test_sched.c:fd_clock_tile_recal_next	0
test_sched.c:fd_clock_tile_set	0
test_sched.c:fd_clock_tile_tickcomp_to_wallclock	0
test_sched.c:fd_clock_tile_tickcount_to_wallclock	0
test_sched.c:fd_clock_tile_wallclock_to_tickcount	0
test_snapct_tile.c:fd_clock_tile_init	1113
test_snapct_tile.c:fd_clock_tile_now	3528
test_snapct_tile.c:fd_clock_tile_recal	0
test_snapct_tile.c:fd_clock_tile_recal_due	0
test_snapct_tile.c:fd_clock_tile_recal_next	0
test_snapct_tile.c:fd_clock_tile_set	0
test_snapct_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_snapct_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_snapct_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_snapld_tile.c:fd_clock_tile_init	9
test_snapld_tile.c:fd_clock_tile_now	15
test_snapld_tile.c:fd_clock_tile_recal	0
test_snapld_tile.c:fd_clock_tile_recal_due	0
test_snapld_tile.c:fd_clock_tile_recal_next	0
test_snapld_tile.c:fd_clock_tile_set	0
test_snapld_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_snapld_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_snapld_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_snapsv.c:fd_clock_tile_init	0
test_snapsv.c:fd_clock_tile_now	0
test_snapsv.c:fd_clock_tile_recal	0
test_snapsv.c:fd_clock_tile_recal_due	0
test_snapsv.c:fd_clock_tile_recal_next	0
test_snapsv.c:fd_clock_tile_set	0
test_snapsv.c:fd_clock_tile_tickcomp_to_wallclock	0
test_snapsv.c:fd_clock_tile_tickcount_to_wallclock	0
test_snapsv.c:fd_clock_tile_wallclock_to_tickcount	0
test_snapsv_tile.c:fd_clock_tile_init	162
test_snapsv_tile.c:fd_clock_tile_now	0
test_snapsv_tile.c:fd_clock_tile_recal	0
test_snapsv_tile.c:fd_clock_tile_recal_due	0
test_snapsv_tile.c:fd_clock_tile_recal_next	0
test_snapsv_tile.c:fd_clock_tile_set	0
test_snapsv_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_snapsv_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_snapsv_tile.c:fd_clock_tile_wallclock_to_tickcount	0
test_votor_tile.c:fd_clock_tile_init	108
test_votor_tile.c:fd_clock_tile_now	462
test_votor_tile.c:fd_clock_tile_recal	4
test_votor_tile.c:fd_clock_tile_recal_due	78
test_votor_tile.c:fd_clock_tile_recal_next	78
test_votor_tile.c:fd_clock_tile_set	57
test_votor_tile.c:fd_clock_tile_tickcomp_to_wallclock	0
test_votor_tile.c:fd_clock_tile_tickcount_to_wallclock	0
test_votor_tile.c:fd_clock_tile_wallclock_to_tickcount	36
topology.c:fd_clock_tile_init	0
topology.c:fd_clock_tile_now	0
topology.c:fd_clock_tile_recal	0
topology.c:fd_clock_tile_recal_due	0
topology.c:fd_clock_tile_recal_next	0
topology.c:fd_clock_tile_set	0
topology.c:fd_clock_tile_tickcomp_to_wallclock	0
topology.c:fd_clock_tile_tickcount_to_wallclock	0
topology.c:fd_clock_tile_wallclock_to_tickcount	0
watch.c:fd_clock_tile_init	0
watch.c:fd_clock_tile_now	0
watch.c:fd_clock_tile_recal	0
watch.c:fd_clock_tile_recal_due	0
watch.c:fd_clock_tile_recal_next	0
watch.c:fd_clock_tile_set	0
watch.c:fd_clock_tile_tickcomp_to_wallclock	0
watch.c:fd_clock_tile_tickcount_to_wallclock	0
watch.c:fd_clock_tile_wallclock_to_tickcount	0

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