LCOV - code coverage report

Current view: top level - disco/net/mlx5 - fd_mlx5_tile.c (source / functions) Hit Total Coverage Test: cov.lcov Lines: 701 1015 69.1 % Date: 2026-09-17 04:28:31 Functions: 32 80 40.0 %

Function Name	Hit count
fd_mlx5_tile.c:after_credit	0
fd_mlx5_tile.c:after_frag	0
fd_mlx5_tile.c:before_credit	0
fd_mlx5_tile.c:before_frag	0
fd_mlx5_tile.c:during_frag	0
fd_mlx5_tile.c:during_housekeeping	0
fd_mlx5_tile.c:fd_mlx5_hw_dma_from_device	0
fd_mlx5_tile.c:fd_mlx5_hw_dma_to_device	0
fd_mlx5_tile.c:fd_mlx5_hw_init_queues	0
fd_mlx5_tile.c:fd_mlx5_hw_init_rx_wqe	0
fd_mlx5_tile.c:fd_mlx5_hw_init_tx_wqe	0
fd_mlx5_tile.c:fd_mlx5_hw_invalidate_cqes	0
fd_mlx5_tile.c:fd_mlx5_hw_join_queues	0
fd_mlx5_tile.c:fd_mlx5_hw_poll_rx_cq	0
fd_mlx5_tile.c:fd_mlx5_hw_poll_tx_cq	0
fd_mlx5_tile.c:fd_mlx5_hw_post_recv	0
fd_mlx5_tile.c:fd_mlx5_hw_post_send	0
fd_mlx5_tile.c:fd_mlx5_hw_ring_sq	0
fd_mlx5_tile.c:fd_mlx5_queue_footprint	0
fd_mlx5_tile.c:fd_mlx5_tile_gre_tunnels_refresh	0
fd_mlx5_tile.c:fd_mlx5_tile_if_ip4_addr	0
fd_mlx5_tile.c:fd_mlx5_tile_join_obj_workspace	0
fd_mlx5_tile.c:fd_mlx5_tile_packet_memory	0
fd_mlx5_tile.c:fd_mlx5_tile_poll_rx	0
fd_mlx5_tile.c:fd_mlx5_tile_poll_tx	0
fd_mlx5_tile.c:fd_mlx5_tile_rx_dst_port_add	0
fd_mlx5_tile.c:fd_mlx5_tile_rx_dst_port_lookup	0
fd_mlx5_tile.c:fd_mlx5_tile_rx_dst_ports_init	0
fd_mlx5_tile.c:fd_mlx5_tile_rx_pkt	0
fd_mlx5_tile.c:fd_mlx5_tile_rx_recycle	0
fd_mlx5_tile.c:fd_mlx5_tile_sq_flush	0
fd_mlx5_tile.c:fd_mlx5_tile_tx_chunk	0
fd_mlx5_tile.c:metrics_write	0
fd_mlx5_tile.c:populate_allowed_fds	0
fd_mlx5_tile.c:populate_allowed_seccomp	0
fd_mlx5_tile.c:privileged_init	0
fd_mlx5_tile.c:scratch_align	0
fd_mlx5_tile.c:scratch_footprint	0
fd_mlx5_tile.c:unprivileged_init	0
fd_mlx5_tile_fib4_join	0
fd_topo_install_mlx5	0
test_mlx5_tile.c:during_housekeeping	0
test_mlx5_tile.c:fd_mlx5_tile_if_ip4_addr	0
test_mlx5_tile.c:fd_mlx5_tile_join_obj_workspace	0
test_mlx5_tile.c:fd_mlx5_tile_packet_memory	0
test_mlx5_tile.c:populate_allowed_fds	0
test_mlx5_tile.c:populate_allowed_seccomp	0
test_mlx5_tile.c:privileged_init	0
test_mlx5_tile.c:fd_mlx5_tile_gre_tunnels_refresh	12
test_mlx5_tile.c:metrics_write	12
test_mlx5_tile.c:unprivileged_init	12
test_mlx5_tile.c:fd_mlx5_tile_sq_flush	18
test_mlx5_tile.c:fd_mlx5_tile_poll_tx	24
test_mlx5_tile.c:scratch_footprint	24
test_mlx5_tile.c:before_credit	30
test_mlx5_tile.c:fd_mlx5_hw_init_queues	30
test_mlx5_tile.c:fd_mlx5_hw_join_queues	30
test_mlx5_tile.c:fd_mlx5_hw_ring_sq	48
test_mlx5_tile.c:fd_mlx5_tile_rx_dst_ports_init	48
test_mlx5_tile.c:fd_mlx5_hw_invalidate_cqes	60
test_mlx5_tile.c:fd_mlx5_hw_post_send	63
test_mlx5_tile.c:fd_mlx5_hw_poll_tx_cq	84
test_mlx5_tile.c:scratch_align	84
test_mlx5_tile.c:after_frag	102
test_mlx5_tile.c:during_frag	117
test_mlx5_tile.c:fd_mlx5_queue_footprint	144
test_mlx5_tile.c:before_frag	162
test_mlx5_tile.c:fd_mlx5_hw_init_tx_wqe	180
test_mlx5_tile.c:fd_mlx5_tile_rx_pkt	234
test_mlx5_tile.c:fd_mlx5_tile_rx_dst_port_lookup	237
test_mlx5_tile.c:after_credit	288
test_mlx5_tile.c:fd_mlx5_tile_poll_rx	288
test_mlx5_tile.c:fd_mlx5_tile_tx_chunk	291
test_mlx5_tile.c:fd_mlx5_hw_poll_rx_cq	324
test_mlx5_tile.c:fd_mlx5_tile_rx_dst_port_add	432
test_mlx5_tile.c:fd_mlx5_hw_dma_from_device	546
test_mlx5_tile.c:fd_mlx5_hw_post_recv	3108
test_mlx5_tile.c:fd_mlx5_hw_dma_to_device	3204
test_mlx5_tile.c:fd_mlx5_hw_init_rx_wqe	24864
test_mlx5_tile.c:fd_mlx5_tile_rx_recycle	24912

Generated by: LCOV version 1.14