LCOV - code coverage report

Current view: top level - disco/quic - fd_tpu.h (source / functions) Hit Total Coverage Test: cov.lcov Lines: 45 53 84.9 % Date: 2025-01-08 12:08:44 Functions: 10 56 17.9 %

Function Name	Hit count
fd_frankendancer.c:fd_tpu_reasm_acquire	0
fd_frankendancer.c:fd_tpu_reasm_key_hash	0
fd_frankendancer.c:fd_tpu_reasm_peek_tail	0
fd_frankendancer.c:fd_tpu_reasm_pub_slots_laddr	0
fd_frankendancer.c:fd_tpu_reasm_req_data_sz	0
fd_frankendancer.c:fd_tpu_reasm_slots_laddr	0
fd_frankendancer.c:fd_tpu_reasm_slots_laddr_const	0
fd_quic_tile.c:fd_tpu_reasm_acquire	0
fd_quic_tile.c:fd_tpu_reasm_key_hash	0
fd_quic_tile.c:fd_tpu_reasm_peek_tail	0
fd_quic_tile.c:fd_tpu_reasm_pub_slots_laddr	0
fd_quic_tile.c:fd_tpu_reasm_req_data_sz	0
fd_quic_tile.c:fd_tpu_reasm_slots_laddr	0
fd_quic_tile.c:fd_tpu_reasm_slots_laddr_const	0
fd_quic_trace_frame.c:fd_tpu_reasm_acquire	0
fd_quic_trace_frame.c:fd_tpu_reasm_key_hash	0
fd_quic_trace_frame.c:fd_tpu_reasm_peek_tail	0
fd_quic_trace_frame.c:fd_tpu_reasm_pub_slots_laddr	0
fd_quic_trace_frame.c:fd_tpu_reasm_req_data_sz	0
fd_quic_trace_frame.c:fd_tpu_reasm_slots_laddr	0
fd_quic_trace_frame.c:fd_tpu_reasm_slots_laddr_const	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_acquire	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_key_hash	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_peek_tail	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_pub_slots_laddr	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_req_data_sz	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_slots_laddr	0
fd_quic_trace_log_tile.c:fd_tpu_reasm_slots_laddr_const	0
fd_quic_trace_main.c:fd_tpu_reasm_acquire	0
fd_quic_trace_main.c:fd_tpu_reasm_key_hash	0
fd_quic_trace_main.c:fd_tpu_reasm_peek_tail	0
fd_quic_trace_main.c:fd_tpu_reasm_pub_slots_laddr	0
fd_quic_trace_main.c:fd_tpu_reasm_req_data_sz	0
fd_quic_trace_main.c:fd_tpu_reasm_slots_laddr	0
fd_quic_trace_main.c:fd_tpu_reasm_slots_laddr_const	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_acquire	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_key_hash	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_peek_tail	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_pub_slots_laddr	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_req_data_sz	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_slots_laddr	0
fd_quic_trace_rx_tile.c:fd_tpu_reasm_slots_laddr_const	0
fd_tpu_reasm.c:fd_tpu_reasm_acquire	0
fd_tpu_reasm.c:fd_tpu_reasm_peek_tail	0
test_tpu_reasm.c:fd_tpu_reasm_peek_tail	0
test_tpu_reasm.c:fd_tpu_reasm_req_data_sz	0
fd_tpu_reasm.c:fd_tpu_reasm_req_data_sz	3
test_tpu_reasm.c:fd_tpu_reasm_slots_laddr_const	768
fd_tpu_reasm.c:fd_tpu_reasm_pub_slots_laddr	65847
test_tpu_reasm.c:fd_tpu_reasm_acquire	76509
test_tpu_reasm.c:fd_tpu_reasm_pub_slots_laddr	150936
fd_tpu_reasm.c:fd_tpu_reasm_key_hash	238107
fd_tpu_reasm.c:fd_tpu_reasm_slots_laddr_const	358185
fd_tpu_reasm.c:fd_tpu_reasm_slots_laddr	606582
test_tpu_reasm.c:fd_tpu_reasm_key_hash	19319424
test_tpu_reasm.c:fd_tpu_reasm_slots_laddr	19470360

Generated by: LCOV version 1.14