Line data Source code
1 : /* This is the VM SBPF interpreter core. The caller unpacks the VM
2 : state and then just lets execution continue into this (or jumps to
3 : interp_exec) to start running. The VM will run until it halts or
4 : faults. On normal termination, it will branch to interp_halt to
5 : exit. Each fault has its own exit label to allow the caller to
6 : handle individually. */
7 :
8 : /* FIXME: SIGILLS FOR VARIOUS THINGS THAT HAVE UNNECESSARY BITS IN IMM
9 : SET? (LIKE WIDE SHIFTS?) */
10 :
11 0 : # if defined(__GNUC__) /* -Wpedantic rejects labels as values and rejects goto *expr */
12 0 : # pragma GCC diagnostic push
13 0 : # pragma GCC diagnostic ignored "-Wpedantic"
14 0 : # endif
15 :
16 0 : # if defined(__clang__) /* Clang is differently picky about labels as values and goto *expr */
17 0 : # pragma clang diagnostic push
18 0 : # pragma clang diagnostic ignored "-Wpedantic"
19 0 : # pragma clang diagnostic ignored "-Wgnu-label-as-value"
20 0 : # endif
21 :
22 : /* Include the jump table */
23 :
24 8223 : # include "fd_vm_interp_jump_table.c"
25 :
26 : /* Update the jump table based on SBPF version */
27 :
28 0 : ulong sbpf_version = vm->sbpf_version;
29 :
30 : /* Unpack the VM state */
31 :
32 0 : ulong pc = vm->pc;
33 0 : ulong ic = vm->ic;
34 0 : ulong cu = vm->cu;
35 0 : ulong frame_cnt = vm->frame_cnt;
36 :
37 0 : void const * const * const version_interp_jump_table = interp_jump_table[ sbpf_version ];
38 :
39 : /* FD_VM_INTERP_INSTR_EXEC loads the first word of the instruction at
40 : pc, parses it, fetches the associated register values and then
41 : jumps to the code that executes the instruction. On normal
42 : instruction execution, the pc will be updated and
43 : FD_VM_INTERP_INSTR_EXEC will be invoked again to do the next
44 : instruction. After a normal halt, this will branch to interp_halt.
45 : Otherwise, it will branch to the appropriate normal termination. */
46 :
47 0 : ulong instr;
48 0 : ulong opcode;
49 0 : ulong dst;
50 0 : ulong src;
51 0 : ulong offset; /* offset is 16-bit but always sign extended, so we handle cast once */
52 0 : uint imm;
53 0 : ulong reg_dst;
54 0 : ulong reg_src;
55 :
56 : /* These mimic the exact Rust semantics for wrapping_shl and wrapping_shr. */
57 :
58 : /* u64::wrapping_shl: a.unchecked_shl(b & (64 - 1))
59 :
60 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shl
61 : */
62 465 : #define FD_RUST_ULONG_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 63 ) ))
63 :
64 : /* u64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
65 :
66 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shr
67 : */
68 21 : #define FD_RUST_ULONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
69 :
70 : /* u32::wrapping_shl: a.unchecked_shl(b & (32 - 1))
71 :
72 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shl
73 : */
74 900 : #define FD_RUST_UINT_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 31 ) ))
75 :
76 : /* u32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
77 :
78 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shr
79 : */
80 18 : #define FD_RUST_UINT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
81 :
82 : /* i32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
83 :
84 : https://doc.rust-lang.org/std/primitive.i32.html#method.wrapping_shr
85 : */
86 243 : #define FD_RUST_INT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
87 :
88 : /* i64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
89 :
90 : https://doc.rust-lang.org/std/primitive.i64.html#method.wrapping_shr
91 : */
92 228 : #define FD_RUST_LONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
93 :
94 :
95 0 : # define FD_VM_INTERP_INSTR_EXEC \
96 382851 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext; /* Note: untaken branches don't consume BTB */ \
97 382851 : instr = text[ pc ]; /* Guaranteed in-bounds */ \
98 382749 : opcode = fd_vm_instr_opcode( instr ); /* in [0,256) even if malformed */ \
99 382749 : dst = fd_vm_instr_dst ( instr ); /* in [0, 16) even if malformed */ \
100 382749 : src = fd_vm_instr_src ( instr ); /* in [0, 16) even if malformed */ \
101 382749 : offset = fd_vm_instr_offset( instr ); /* in [-2^15,2^15) even if malformed */ \
102 382749 : imm = fd_vm_instr_imm ( instr ); /* in [0,2^32) even if malformed */ \
103 382749 : reg_dst = reg[ dst ]; /* Guaranteed in-bounds */ \
104 382749 : reg_src = reg[ src ]; /* Guaranteed in-bounds */ \
105 382749 : goto *version_interp_jump_table[ opcode ] /* Guaranteed in-bounds */
106 :
107 : /* FD_VM_INTERP_SYSCALL_EXEC
108 : (macro to handle the logic of 0x85 pre- and post- SIMD-0178: static syscalls)
109 :
110 : Setup.
111 : Update the vm with the current vm execution state for the
112 : syscall. Note that BRANCH_BEGIN has pc at the syscall and
113 : already updated ic and cu to reflect all instructions up to
114 : and including the syscall instruction itself.
115 :
116 : Execution.
117 : Do the syscall. We use ret reduce the risk of the syscall
118 : accidentally modifying other registers (note however since a
119 : syscall has the vm handle it still do arbitrary modifications
120 : to the vm state) and the risk of a pointer escape on reg from
121 : inhibiting compiler optimizations (this risk is likely low in
122 : as this is the only point in the whole interpreter core that
123 : calls outside this translation unit).
124 : At this point, vm->cu is positive.
125 :
126 : Error handling.
127 : If we trust syscall implementations to handle the vm state
128 : correctly, the below could be implemented as unpacking the vm
129 : state and jumping to sigsys on error. But we provide some
130 : extra protection to make various strong guarantees:
131 :
132 : - We do not let the syscall modify pc currently as nothing
133 : requires this and it reduces risk of a syscall bug mucking
134 : up the interpreter. If there ever was a syscall that
135 : needed to modify the pc (e.g. a syscall that has execution
136 : resume from a different location than the instruction
137 : following the syscall), do "pc = vm->pc" below.
138 :
139 : - We do not let the syscall modify ic currently as nothing
140 : requires this and it keeps the ic precise. If a future
141 : syscall needs this, do "ic = vm->ic" below.
142 :
143 : - We do not let the syscall increase cu as nothing requires
144 : this and it guarantees the interpreter will halt in a
145 : reasonable finite amount of time. If a future syscall
146 : needs this, do "cu = vm->cu" below.
147 :
148 : - A syscall that returns SIGCOST is always treated as though
149 : it also zerod cu.
150 :
151 : At this point, vm->cu is whatever the syscall tried to set
152 : and cu is positive.
153 :
154 : Exit
155 : At this point, cu is positive and err is clear.
156 : */
157 :
158 0 : # if FD_HAS_FLATCC
159 0 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP \
160 : /* Dumping for debugging purposes */ \
161 3 : if( FD_UNLIKELY( vm->dump_syscall_to_pb ) ) { \
162 0 : fd_dump_vm_syscall_to_protobuf( vm, syscall->name ); \
163 0 : }
164 : # else
165 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP
166 : # endif
167 0 : # define FD_VM_INTERP_SYSCALL_EXEC \
168 : /* Setup */ \
169 3 : vm->pc = pc; \
170 3 : vm->ic = ic; \
171 3 : vm->cu = cu; \
172 3 : vm->frame_cnt = frame_cnt; \
173 3 : FD_VM_INTERP_SYSCALL_EXEC_DUMP \
174 : /* Execution */ \
175 3 : ulong ret[1]; \
176 3 : err = syscall->func( vm, reg[1], reg[2], reg[3], reg[4], reg[5], ret ); \
177 3 : reg[0] = ret[0]; \
178 : /* Error handling */ \
179 3 : ulong cu_req = vm->cu; \
180 3 : cu = fd_ulong_min( cu_req, cu ); \
181 3 : if( FD_UNLIKELY( err ) ) { \
182 0 : if( err==FD_VM_SYSCALL_ERR_COMPUTE_BUDGET_EXCEEDED ) cu = 0UL; /* cmov */ \
183 0 : FD_VM_TEST_ERR_EXISTS( vm ); \
184 0 : goto sigsyscall; \
185 0 : } \
186 : /* Exit */
187 :
188 :
189 : /* FD_VM_INTERP_INSTR_BEGIN / FD_VM_INTERP_INSTR_END bracket opcode's
190 : implementation for an opcode that does not branch. On entry, the
191 : instruction word has been unpacked into dst / src / offset / imm
192 : and reg[dst] / reg[src] has been prefetched into reg_dst / reg_src. */
193 :
194 245733 : # define FD_VM_INTERP_INSTR_BEGIN(opcode) interp_##opcode:
195 :
196 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~0.3% faster in some benchmarks, slower in others but more code footprint */
197 245361 : # define FD_VM_INTERP_INSTR_END pc++; FD_VM_INTERP_INSTR_EXEC
198 : # else /* Use this version when tracing or optimizing code footprint */
199 0 : # define FD_VM_INTERP_INSTR_END pc++; goto interp_exec
200 : # endif
201 :
202 : /* Instead of doing a lot of compute budget calcs and tests every
203 : instruction, we note that the program counter increases
204 : monotonically after a branch (or a program start) until the next
205 : branch (or program termination). We save the program counter of
206 : the start of such a segment in pc0. Whenever we encounter a branch
207 : (or a program termination) at pc, we know we processed pc-pc0+1
208 : text words (including the text word for the branch instruction
209 : itself as all branch instructions are single word).
210 :
211 : Each instruction costs 1 cu (syscalls can cost extra on top of
212 : this that is accounted separately in CALL_IMM below). Since there
213 : could have been multiword instructions in this segment, at start of
214 : such a segment, we zero out the accumulator ic_correction and have
215 : every multiword instruction in the segment accumulate the number of
216 : extra text words it has to this variable. (Sigh ... it would be a
217 : lot simpler to bill based on text words processed but this would be
218 : very difficult to make this protocol change at this point.)
219 :
220 : When we encounter a branch at pc, the number of instructions
221 : processed (and thus the number of compute units to bill for that
222 : segment) is thus:
223 :
224 : pc - pc0 + 1 - ic_correction
225 :
226 : IMPORTANT SAFETY TIP! This implies the worst case interval before
227 : checking the cu budget is the worst case text_cnt. But since all
228 : such instructions are cheap 1 cu instructions and processed fast
229 : and text max is limited in size, this should be acceptable in
230 : practice. FIXME: DOUBLE CHECK THE MATH ABOVE AGAINST PROTOCOL
231 : LIMITS. */
232 :
233 0 : ulong pc0 = pc;
234 0 : ulong ic_correction = 0UL;
235 :
236 0 : # define FD_VM_INTERP_BRANCH_BEGIN(opcode) \
237 135840 : interp_##opcode: \
238 : /* Bill linear text segment and this branch instruction as per the above */ \
239 135840 : ic_correction = pc - pc0 + 1UL - ic_correction; \
240 135840 : ic += ic_correction; \
241 135840 : if( FD_UNLIKELY( ic_correction>cu ) ) goto sigcost; /* Note: untaken branches don't consume BTB */ \
242 135840 : cu -= ic_correction; \
243 : /* At this point, cu>=0 */ \
244 135159 : ic_correction = 0UL;
245 :
246 : /* FIXME: debatable if it is better to do pc++ here or have the
247 : instruction implementations do it in their code path. */
248 :
249 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~4% faster in some benchmarks, slower in others but more code footprint */
250 : # define FD_VM_INTERP_BRANCH_END \
251 129261 : pc++; \
252 129261 : pc0 = pc; /* Start a new linear segment */ \
253 129267 : FD_VM_INTERP_INSTR_EXEC
254 : # else /* Use this version when tracing or optimizing code footprint */
255 : # define FD_VM_INTERP_BRANCH_END \
256 0 : pc++; \
257 0 : pc0 = pc; /* Start a new linear segment */ \
258 : /* FIXME: TEST sigsplit HERE */ \
259 0 : goto interp_exec
260 : # endif
261 :
262 : /* FD_VM_INTERP_STACK_PUSH pushes reg[6:9] onto the shadow stack and
263 : advances reg[10] to a new user stack frame. If there are no more
264 : stack frames available, will do a SIGSTACK. */
265 :
266 : /* FIXME: double check faulting is desired on stack overflow. */
267 :
268 : /* FIXME: a pre-belt-sanding FIXME implied the TLB should be updated
269 : to prevent byte code from accessing the stack outside its current
270 : stack frame. But this would break the common practice of a
271 : function passing a pointer to something on its stack into a
272 : function that it calls:
273 :
274 : void foo( ... ) {
275 : ...
276 : int ret;
277 : bar( &ret );
278 : ...
279 : }
280 :
281 : So this probably shouldn't be done. But, if it is in fact
282 : necessary, the TLB updates would be here and in pop. */
283 :
284 : /* FIXME: unvalidated code mucking with r10 */
285 :
286 0 : # define FD_VM_INTERP_STACK_PUSH \
287 42 : shadow[ frame_cnt ].r6 = reg[6]; \
288 42 : shadow[ frame_cnt ].r7 = reg[7]; \
289 42 : shadow[ frame_cnt ].r8 = reg[8]; \
290 42 : shadow[ frame_cnt ].r9 = reg[9]; \
291 42 : shadow[ frame_cnt ].r10 = reg[10]; \
292 42 : shadow[ frame_cnt ].pc = pc; \
293 42 : if( FD_UNLIKELY( ++frame_cnt>=frame_max ) ) goto sigstack; /* Note: untaken branches don't consume BTB */ \
294 42 : if( vm->stack_frame_gaps_enabled ) reg[10] += FD_VM_STACK_FRAME_SZ * 2UL; \
295 42 : else if( !fd_sbpf_dynamic_stack_frames_enabled( sbpf_version ) ) reg[10] += FD_VM_STACK_FRAME_SZ; \
296 0 :
297 : /* We subtract the heap cost in the BPF loader */
298 :
299 0 : goto interp_exec; /* Silly but to avoid unused label warning in some configurations */
300 8223 : interp_exec:
301 :
302 : # ifdef FD_VM_INTERP_EXE_TRACING_ENABLED
303 : /* Note: when tracing or optimizing for code footprint, all
304 : instruction execution starts here such that this is only point
305 : where exe tracing diagnostics are needed. */
306 0 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext;
307 0 : fd_vm_trace_event_exe( vm->trace, pc, ic + ( pc - pc0 - ic_correction ), cu, reg, vm->text + pc, vm->text_cnt - pc, ic_correction, frame_cnt );
308 0 : # endif
309 :
310 8223 : FD_VM_INTERP_INSTR_EXEC;
311 :
312 : /* 0x00 - 0x0f ******************************************************/
313 :
314 8223 : FD_VM_INTERP_INSTR_BEGIN(0x04) /* FD_SBPF_OP_ADD_IMM */
315 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)imm );
316 36 : FD_VM_INTERP_INSTR_END;
317 :
318 45 : FD_VM_INTERP_INSTR_BEGIN(0x04depr) /* FD_SBPF_OP_ADD_IMM deprecated SIMD-0174 */
319 45 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)imm );
320 45 : FD_VM_INTERP_INSTR_END;
321 :
322 639 : FD_VM_INTERP_BRANCH_BEGIN(0x05) /* FD_SBPF_OP_JA */
323 633 : pc += offset;
324 633 : FD_VM_INTERP_BRANCH_END;
325 :
326 30108 : FD_VM_INTERP_INSTR_BEGIN(0x07) /* FD_SBPF_OP_ADD64_IMM */
327 30108 : reg[ dst ] = reg_dst + (ulong)(long)(int)imm;
328 30108 : FD_VM_INTERP_INSTR_END;
329 :
330 33 : FD_VM_INTERP_INSTR_BEGIN(0x0c) /* FD_SBPF_OP_ADD_REG */
331 33 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)reg_src );
332 33 : FD_VM_INTERP_INSTR_END;
333 :
334 39 : FD_VM_INTERP_INSTR_BEGIN(0x0cdepr) /* FD_SBPF_OP_ADD_REG deprecated SIMD-0174 */
335 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)reg_src );
336 39 : FD_VM_INTERP_INSTR_END;
337 :
338 78 : FD_VM_INTERP_INSTR_BEGIN(0x0f) /* FD_SBPF_OP_ADD64_REG */
339 78 : reg[ dst ] = reg_dst + reg_src;
340 78 : FD_VM_INTERP_INSTR_END;
341 :
342 : /* 0x10 - 0x1f ******************************************************/
343 :
344 36 : FD_VM_INTERP_INSTR_BEGIN(0x14) /* FD_SBPF_OP_SUB_IMM */
345 36 : reg[ dst ] = (ulong)(uint)( (int)imm - (int)reg_dst );
346 36 : FD_VM_INTERP_INSTR_END;
347 :
348 39 : FD_VM_INTERP_INSTR_BEGIN(0x14depr) /* FD_SBPF_OP_SUB_IMM deprecated SIMD-0174 */
349 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)imm );
350 39 : FD_VM_INTERP_INSTR_END;
351 :
352 1254 : FD_VM_INTERP_BRANCH_BEGIN(0x15) /* FD_SBPF_OP_JEQ_IMM */
353 1242 : pc += fd_ulong_if( reg_dst==(ulong)(long)(int)imm, offset, 0UL );
354 1242 : FD_VM_INTERP_BRANCH_END;
355 :
356 33 : FD_VM_INTERP_INSTR_BEGIN(0x17) /* FD_SBPF_OP_SUB64_IMM */
357 33 : reg[ dst ] = (ulong)(long)(int)imm - reg_dst;
358 33 : FD_VM_INTERP_INSTR_END;
359 :
360 36 : FD_VM_INTERP_INSTR_BEGIN(0x17depr) /* FD_SBPF_OP_SUB64_IMM deprecated SIMD-0174 */
361 36 : reg[ dst ] = reg_dst - (ulong)(long)(int)imm;
362 36 : FD_VM_INTERP_INSTR_END;
363 :
364 117 : FD_VM_INTERP_INSTR_BEGIN(0x18) /* FD_SBPF_OP_LDQ */
365 117 : pc++;
366 117 : ic_correction++;
367 : /* No need to check pc because it's already checked during validation.
368 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigsplit; // Note: untaken branches don't consume BTB */
369 117 : reg[ dst ] = (ulong)((ulong)imm | ((ulong)fd_vm_instr_imm( text[ pc ] ) << 32));
370 117 : FD_VM_INTERP_INSTR_END;
371 :
372 36 : FD_VM_INTERP_INSTR_BEGIN(0x1c) /* FD_SBPF_OP_SUB_REG */
373 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst - (int)reg_src );
374 36 : FD_VM_INTERP_INSTR_END;
375 :
376 39 : FD_VM_INTERP_INSTR_BEGIN(0x1cdepr) /* FD_SBPF_OP_SUB_REG deprecated SIMD-0174 */
377 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)reg_src );
378 39 : FD_VM_INTERP_INSTR_END;
379 :
380 648 : FD_VM_INTERP_BRANCH_BEGIN(0x1d) /* FD_SBPF_OP_JEQ_REG */
381 642 : pc += fd_ulong_if( reg_dst==reg_src, offset, 0UL );
382 642 : FD_VM_INTERP_BRANCH_END;
383 :
384 30093 : FD_VM_INTERP_INSTR_BEGIN(0x1f) /* FD_SBPF_OP_SUB64_REG */
385 30093 : reg[ dst ] = reg_dst - reg_src;
386 30093 : FD_VM_INTERP_INSTR_END;
387 :
388 : /* 0x20 - 0x2f ******************************************************/
389 :
390 42 : FD_VM_INTERP_INSTR_BEGIN(0x24) /* FD_SBPF_OP_MUL_IMM */
391 42 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)imm );
392 42 : FD_VM_INTERP_INSTR_END;
393 :
394 3126 : FD_VM_INTERP_BRANCH_BEGIN(0x25) /* FD_SBPF_OP_JGT_IMM */
395 3096 : pc += fd_ulong_if( reg_dst>(ulong)(long)(int)imm, offset, 0UL );
396 3096 : FD_VM_INTERP_BRANCH_END;
397 :
398 9 : FD_VM_INTERP_INSTR_BEGIN(0x27) { /* FD_SBPF_OP_STB */
399 9 : ulong vaddr = reg_dst + offset;
400 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
401 9 : if( FD_UNLIKELY( !haddr ) ) {
402 6 : vm->segv_vaddr = vaddr;
403 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
404 6 : vm->segv_access_len = 1UL;
405 6 : goto sigsegv;
406 6 : } /* Note: untaken branches don't consume BTB */
407 3 : fd_vm_mem_st_1( haddr, (uchar)imm );
408 3 : }
409 3 : FD_VM_INTERP_INSTR_END;
410 :
411 78 : FD_VM_INTERP_INSTR_BEGIN(0x2c) { /* FD_SBPF_OP_LDXB */
412 78 : ulong vaddr = reg_src + offset;
413 78 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_ld_sz, 0, 0UL );
414 78 : if( FD_UNLIKELY( !haddr ) ) {
415 24 : vm->segv_vaddr = vaddr;
416 24 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
417 24 : vm->segv_access_len = 1UL;
418 24 : goto sigsegv;
419 24 : } /* Note: untaken branches don't consume BTB */
420 54 : reg[ dst ] = fd_vm_mem_ld_1( haddr );
421 54 : }
422 54 : FD_VM_INTERP_INSTR_END;
423 :
424 3117 : FD_VM_INTERP_BRANCH_BEGIN(0x2d) /* FD_SBPF_OP_JGT_REG */
425 3087 : pc += fd_ulong_if( reg_dst>reg_src, offset, 0UL );
426 3087 : FD_VM_INTERP_BRANCH_END;
427 :
428 9 : FD_VM_INTERP_INSTR_BEGIN(0x2f) { /* FD_SBPF_OP_STXB */
429 9 : ulong vaddr = reg_dst + offset;
430 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
431 9 : if( FD_UNLIKELY( !haddr ) ) {
432 6 : vm->segv_vaddr = vaddr;
433 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
434 6 : vm->segv_access_len = 1UL;
435 6 : goto sigsegv;
436 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigrdonly */
437 3 : fd_vm_mem_st_1( haddr, (uchar)reg_src );
438 3 : }
439 3 : FD_VM_INTERP_INSTR_END;
440 :
441 42 : FD_VM_INTERP_INSTR_BEGIN(0x27depr) /* FD_SBPF_OP_MUL64_IMM */
442 42 : reg[ dst ] = (ulong)( (long)reg_dst * (long)(int)imm );
443 42 : FD_VM_INTERP_INSTR_END;
444 :
445 39 : FD_VM_INTERP_INSTR_BEGIN(0x2cdepr) /* FD_SBPF_OP_MUL_REG */
446 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)reg_src );
447 39 : FD_VM_INTERP_INSTR_END;
448 :
449 30078 : FD_VM_INTERP_INSTR_BEGIN(0x2fdepr) /* FD_SBPF_OP_MUL64_REG */
450 30078 : reg[ dst ] = reg_dst * reg_src;
451 30078 : FD_VM_INTERP_INSTR_END;
452 :
453 : /* 0x30 - 0x3f ******************************************************/
454 :
455 42 : FD_VM_INTERP_INSTR_BEGIN(0x34) /* FD_SBPF_OP_DIV_IMM */
456 42 : /* FIXME: convert to a multiply at validation time (usually probably
457 42 : not worth it) */
458 42 : reg[ dst ] = (ulong)((uint)reg_dst / imm);
459 42 : FD_VM_INTERP_INSTR_END;
460 :
461 6123 : FD_VM_INTERP_BRANCH_BEGIN(0x35) /* FD_SBPF_OP_JGE_IMM */
462 6063 : pc += fd_ulong_if( reg_dst>=(ulong)(long)(int)imm, offset, 0UL );
463 6063 : FD_VM_INTERP_BRANCH_END;
464 :
465 3 : FD_VM_INTERP_INSTR_BEGIN(0x36) /* FD_SBPF_OP_UHMUL64_IMM */
466 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)(ulong)imm ) >> 64 );
467 3 : FD_VM_INTERP_INSTR_END;
468 :
469 9 : FD_VM_INTERP_INSTR_BEGIN(0x37) { /* FD_SBPF_OP_STH */
470 9 : ulong vaddr = reg_dst + offset;
471 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
472 9 : int sigsegv = !haddr;
473 9 : if( FD_UNLIKELY( sigsegv ) ) {
474 6 : vm->segv_vaddr = vaddr;
475 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
476 6 : vm->segv_access_len = 2UL;
477 6 : goto sigsegv;
478 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
479 3 : fd_vm_mem_st_2( haddr, (ushort)imm );
480 3 : }
481 3 : FD_VM_INTERP_INSTR_END;
482 :
483 96 : FD_VM_INTERP_INSTR_BEGIN(0x3c) { /* FD_SBPF_OP_LDXH */
484 96 : ulong vaddr = reg_src + offset;
485 96 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_ld_sz, 0, 0UL );
486 96 : int sigsegv = !haddr;
487 96 : if( FD_UNLIKELY( sigsegv ) ) {
488 36 : vm->segv_vaddr = vaddr;
489 36 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
490 36 : vm->segv_access_len = 2UL;
491 36 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
492 36 : }
493 60 : reg[ dst ] = fd_vm_mem_ld_2( haddr );
494 60 : }
495 60 : FD_VM_INTERP_INSTR_END;
496 :
497 35532 : FD_VM_INTERP_BRANCH_BEGIN(0x3d) /* FD_SBPF_OP_JGE_REG */
498 35478 : pc += fd_ulong_if( reg_dst>=reg_src, offset, 0UL );
499 35478 : FD_VM_INTERP_BRANCH_END;
500 :
501 9 : FD_VM_INTERP_INSTR_BEGIN(0x3f) { /* FD_SBPF_OP_STXH */
502 9 : ulong vaddr = reg_dst + offset;
503 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
504 9 : int sigsegv = !haddr;
505 9 : if( FD_UNLIKELY( sigsegv ) ) {
506 6 : vm->segv_vaddr = vaddr;
507 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
508 6 : vm->segv_access_len = 2UL;
509 6 : goto sigsegv;
510 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
511 3 : fd_vm_mem_st_2( haddr, (ushort)reg_src );
512 3 : }
513 3 : FD_VM_INTERP_INSTR_END;
514 :
515 3 : FD_VM_INTERP_INSTR_BEGIN(0x3e) /* FD_SBPF_OP_UHMUL64_REG */
516 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)reg_src ) >> 64 );
517 3 : FD_VM_INTERP_INSTR_END;
518 :
519 45 : FD_VM_INTERP_INSTR_BEGIN(0x37depr) /* FD_SBPF_OP_DIV64_IMM */
520 45 : reg[ dst ] = reg_dst / (ulong)(long)(int)imm;
521 45 : FD_VM_INTERP_INSTR_END;
522 :
523 57 : FD_VM_INTERP_INSTR_BEGIN(0x3cdepr) /* FD_SBPF_OP_DIV_REG */
524 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
525 42 : reg[ dst ] = (ulong)((uint)reg_dst / (uint)reg_src);
526 42 : FD_VM_INTERP_INSTR_END;
527 :
528 30072 : FD_VM_INTERP_INSTR_BEGIN(0x3fdepr) /* FD_SBPF_OP_DIV64_REG */
529 30072 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
530 30060 : reg[ dst ] = reg_dst / reg_src;
531 30060 : FD_VM_INTERP_INSTR_END;
532 :
533 : /* 0x40 - 0x4f ******************************************************/
534 :
535 51 : FD_VM_INTERP_INSTR_BEGIN(0x44) /* FD_SBPF_OP_OR_IMM */
536 51 : reg[ dst ] = (ulong)( (uint)reg_dst | imm );
537 51 : FD_VM_INTERP_INSTR_END;
538 :
539 1266 : FD_VM_INTERP_BRANCH_BEGIN(0x45) /* FD_SBPF_OP_JSET_IMM */
540 1254 : pc += fd_ulong_if( !!(reg_dst & (ulong)(long)(int)imm), offset, 0UL );
541 1254 : FD_VM_INTERP_BRANCH_END;
542 :
543 39 : FD_VM_INTERP_INSTR_BEGIN(0x46) /* FD_SBPF_OP_UDIV32_IMM */
544 39 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)imm );
545 39 : FD_VM_INTERP_INSTR_END;
546 :
547 51 : FD_VM_INTERP_INSTR_BEGIN(0x47) /* FD_SBPF_OP_OR64_IMM */
548 51 : reg[ dst ] = reg_dst | (ulong)(long)(int)imm;
549 51 : FD_VM_INTERP_INSTR_END;
550 :
551 57 : FD_VM_INTERP_INSTR_BEGIN(0x4c) /* FD_SBPF_OP_OR_REG */
552 57 : reg[ dst ] = (ulong)(uint)( reg_dst | reg_src );
553 57 : FD_VM_INTERP_INSTR_END;
554 :
555 663 : FD_VM_INTERP_BRANCH_BEGIN(0x4d) /* FD_SBPF_OP_JSET_REG */
556 657 : pc += fd_ulong_if( !!(reg_dst & reg_src), offset, 0UL );
557 657 : FD_VM_INTERP_BRANCH_END;
558 :
559 48 : FD_VM_INTERP_INSTR_BEGIN(0x4e) /* FD_SBPF_OP_UDIV32_REG */
560 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
561 36 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)reg_src );
562 36 : FD_VM_INTERP_INSTR_END;
563 :
564 57 : FD_VM_INTERP_INSTR_BEGIN(0x4f) /* FD_SBPF_OP_OR64_REG */
565 57 : reg[ dst ] = reg_dst | reg_src;
566 57 : FD_VM_INTERP_INSTR_END;
567 :
568 : /* 0x50 - 0x5f ******************************************************/
569 :
570 54 : FD_VM_INTERP_INSTR_BEGIN(0x54) /* FD_SBPF_OP_AND_IMM */
571 54 : reg[ dst ] = (ulong)( (uint)reg_dst & imm );
572 54 : FD_VM_INTERP_INSTR_END;
573 :
574 30669 : FD_VM_INTERP_BRANCH_BEGIN(0x55) /* FD_SBPF_OP_JNE_IMM */
575 30663 : pc += fd_ulong_if( reg_dst!=(ulong)(long)(int)imm, offset, 0UL );
576 30663 : FD_VM_INTERP_BRANCH_END;
577 :
578 39 : FD_VM_INTERP_INSTR_BEGIN(0x56) /* FD_SBPF_OP_UDIV64_IMM */
579 39 : reg[ dst ] = reg_dst / (ulong)imm;
580 39 : FD_VM_INTERP_INSTR_END;
581 :
582 63 : FD_VM_INTERP_INSTR_BEGIN(0x57) /* FD_SBPF_OP_AND64_IMM */
583 63 : reg[ dst ] = reg_dst & (ulong)(long)(int)imm;
584 63 : FD_VM_INTERP_INSTR_END;
585 :
586 60 : FD_VM_INTERP_INSTR_BEGIN(0x5c) /* FD_SBPF_OP_AND_REG */
587 60 : reg[ dst ] = (ulong)(uint)( reg_dst & reg_src );
588 60 : FD_VM_INTERP_INSTR_END;
589 :
590 657 : FD_VM_INTERP_BRANCH_BEGIN(0x5d) /* FD_SBPF_OP_JNE_REG */
591 651 : pc += fd_ulong_if( reg_dst!=reg_src, offset, 0UL );
592 651 : FD_VM_INTERP_BRANCH_END;
593 :
594 45 : FD_VM_INTERP_INSTR_BEGIN(0x5e) /* FD_SBPF_OP_UDIV64_REG */
595 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
596 36 : reg[ dst ] = reg_dst / reg_src;
597 36 : FD_VM_INTERP_INSTR_END;
598 :
599 48 : FD_VM_INTERP_INSTR_BEGIN(0x5f) /* FD_SBPF_OP_AND64_REG */
600 48 : reg[ dst ] = reg_dst & reg_src;
601 48 : FD_VM_INTERP_INSTR_END;
602 :
603 : /* 0x60 - 0x6f ******************************************************/
604 :
605 : /* FIXME: CHECK THE CU COST MODEL FOR THESE (IS IT LIKE
606 : FD_VM_CONSUME_MEM AND NOT JUST FIXED) */
607 : /* FIXME: MEM TRACING DIAGNOSTICS GO IN HERE */
608 :
609 453 : FD_VM_INTERP_INSTR_BEGIN(0x64) /* FD_SBPF_OP_LSH_IMM */
610 453 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L291 */
611 453 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, (uint)imm ) );
612 453 : FD_VM_INTERP_INSTR_END;
613 :
614 3702 : FD_VM_INTERP_BRANCH_BEGIN(0x65) /* FD_SBPF_OP_JSGT_IMM */
615 3666 : pc += fd_ulong_if( (long)reg_dst>(long)(int)imm, offset, 0UL );
616 3666 : FD_VM_INTERP_BRANCH_END;
617 :
618 39 : FD_VM_INTERP_INSTR_BEGIN(0x66) /* FD_SBPF_OP_UREM32_IMM */
619 39 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)imm );
620 39 : FD_VM_INTERP_INSTR_END;
621 :
622 456 : FD_VM_INTERP_INSTR_BEGIN(0x67) /* FD_SBPF_OP_LSH64_IMM */
623 456 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L376 */
624 456 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, imm );
625 456 : FD_VM_INTERP_INSTR_END;
626 :
627 447 : FD_VM_INTERP_INSTR_BEGIN(0x6c) /* FD_SBPF_OP_LSH_REG */
628 447 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L292 */
629 447 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, reg_src ) );
630 447 : FD_VM_INTERP_INSTR_END;
631 :
632 3108 : FD_VM_INTERP_BRANCH_BEGIN(0x6d) /* FD_SBPF_OP_JSGT_REG */
633 3078 : pc += fd_ulong_if( (long)reg_dst>(long)reg_src, offset, 0UL );
634 3078 : FD_VM_INTERP_BRANCH_END;
635 :
636 48 : FD_VM_INTERP_INSTR_BEGIN(0x6e) /* FD_SBPF_OP_UREM32_REG */
637 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
638 36 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)reg_src );
639 36 : FD_VM_INTERP_INSTR_END;
640 :
641 9 : FD_VM_INTERP_INSTR_BEGIN(0x6f) /* FD_SBPF_OP_LSH64_REG */
642 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L377 */
643 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, reg_src );
644 9 : FD_VM_INTERP_INSTR_END;
645 :
646 : /* 0x70 - 0x7f ******************************************************/
647 :
648 9 : FD_VM_INTERP_INSTR_BEGIN(0x74) /* FD_SBPF_OP_RSH_IMM */
649 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L293 */
650 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, imm ) );
651 9 : FD_VM_INTERP_INSTR_END;
652 :
653 6714 : FD_VM_INTERP_BRANCH_BEGIN(0x75) /* FD_SBPF_OP_JSGE_IMM */
654 6648 : pc += fd_ulong_if( (long)reg_dst>=(long)(int)imm, offset, 0UL );
655 6648 : FD_VM_INTERP_BRANCH_END;
656 :
657 39 : FD_VM_INTERP_INSTR_BEGIN(0x76) /* FD_SBPF_OP_UREM64_IMM */
658 39 : reg[ dst ] = reg_dst % (ulong)imm;
659 39 : FD_VM_INTERP_INSTR_END;
660 :
661 12 : FD_VM_INTERP_INSTR_BEGIN(0x77) /* FD_SBPF_OP_RSH64_IMM */
662 12 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L378 */
663 12 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, imm );
664 12 : FD_VM_INTERP_INSTR_END;
665 :
666 9 : FD_VM_INTERP_INSTR_BEGIN(0x7c) /* FD_SBPF_OP_RSH_REG */
667 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L294 */
668 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, (uint)reg_src ) );
669 9 : FD_VM_INTERP_INSTR_END;
670 :
671 5508 : FD_VM_INTERP_BRANCH_BEGIN(0x7d) /* FD_SBPF_OP_JSGE_REG */
672 5454 : pc += fd_ulong_if( (long)reg_dst>=(long)reg_src, offset, 0UL );
673 5454 : FD_VM_INTERP_BRANCH_END;
674 :
675 45 : FD_VM_INTERP_INSTR_BEGIN(0x7e) /* FD_SBPF_OP_UREM64_REG */
676 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
677 36 : reg[ dst ] = reg_dst % reg_src;
678 36 : FD_VM_INTERP_INSTR_END;
679 :
680 9 : FD_VM_INTERP_INSTR_BEGIN(0x7f) /* FD_SBPF_OP_RSH64_REG */
681 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L379 */
682 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, reg_src );
683 9 : FD_VM_INTERP_INSTR_END;
684 :
685 : /* 0x80-0x8f ********************************************************/
686 :
687 3 : FD_VM_INTERP_INSTR_BEGIN(0x84) /* FD_SBPF_OP_NEG */
688 3 : reg[ dst ] = (ulong)( -(uint)reg_dst );
689 3 : FD_VM_INTERP_INSTR_END;
690 :
691 9 : FD_VM_INTERP_BRANCH_BEGIN(0x85) { /* FD_SBPF_OP_CALL_IMM */
692 :
693 9 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
694 9 : if( FD_UNLIKELY( !syscall ) ) { /* Optimize for the syscall case */
695 :
696 : /* Note we do the stack push before updating the pc(*). This implies
697 : that the call stack frame gets allocated _before_ checking if the
698 : call target is valid. It would be fine to switch the order
699 : though such would change the precise faulting semantics of
700 : sigtextbr and sigstack.
701 :
702 : (*)but after checking calldests, see point below. */
703 :
704 : /* Agave's order of checks
705 : (https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L486):
706 : 1. Lookup imm hash in FunctionRegistry (calldests_test is our equivalent)
707 : 2. Push stack frame
708 : 3. Check PC
709 : 4. Update PC
710 :
711 : Following this precisely is impossible as our PC check also
712 : serves as a bounds check for the calldests_test call. So we
713 : have to perform step 3 before step 1. The following
714 : is a best-effort implementation that should match the VM state
715 : in all ways except error code. */
716 :
717 : /* Special case to handle entrypoint.
718 : ebpf::hash_symbol_name(b"entrypoint") = 0xb00c380, and
719 : fd_pchash_inverse( 0xb00c380U ) = 0x71e3cf81U */
720 6 : if( FD_UNLIKELY( imm==0x71e3cf81U ) ) {
721 0 : FD_VM_INTERP_STACK_PUSH;
722 0 : pc = entry_pc - 1;
723 6 : } else {
724 6 : ulong target_pc = (ulong)fd_pchash_inverse( imm );
725 6 : if( FD_UNLIKELY( target_pc>=text_cnt ) ) {
726 6 : goto sigillbr; /* different return between 0x85 and 0x8d */
727 6 : }
728 0 : if( FD_UNLIKELY( !fd_sbpf_calldests_test( calldests, target_pc ) ) ) {
729 0 : goto sigillbr;
730 0 : }
731 0 : FD_VM_INTERP_STACK_PUSH;
732 0 : pc = target_pc - 1;
733 0 : }
734 :
735 6 : } else {
736 :
737 3 : FD_VM_INTERP_SYSCALL_EXEC;
738 :
739 3 : }
740 9 : } FD_VM_INTERP_BRANCH_END;
741 :
742 39 : FD_VM_INTERP_INSTR_BEGIN(0x86) /* FD_SBPF_OP_LMUL32_IMM */
743 39 : reg[ dst ] = (ulong)( (uint)reg_dst * imm );
744 39 : FD_VM_INTERP_INSTR_END;
745 :
746 9 : FD_VM_INTERP_INSTR_BEGIN(0x87) { /* FD_SBPF_OP_STW */
747 9 : ulong vaddr = reg_dst + offset;
748 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
749 9 : int sigsegv = !haddr;
750 9 : if( FD_UNLIKELY( sigsegv ) ) {
751 6 : vm->segv_vaddr = vaddr;
752 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
753 6 : vm->segv_access_len = 4UL;
754 6 : goto sigsegv;
755 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
756 3 : fd_vm_mem_st_4( haddr, imm );
757 3 : } FD_VM_INTERP_INSTR_END;
758 :
759 3 : FD_VM_INTERP_INSTR_BEGIN(0x87depr) /* FD_SBPF_OP_NEG64 deprecated */
760 3 : reg[ dst ] = -reg_dst;
761 3 : FD_VM_INTERP_INSTR_END;
762 :
763 108 : FD_VM_INTERP_INSTR_BEGIN(0x8c) { /* FD_SBPF_OP_LDXW */
764 108 : ulong vaddr = reg_src + offset;
765 108 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_ld_sz, 0, 0UL );
766 108 : int sigsegv = !haddr;
767 108 : if( FD_UNLIKELY( sigsegv ) ) {
768 48 : vm->segv_vaddr = vaddr;
769 48 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
770 48 : vm->segv_access_len = 4UL;
771 48 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
772 48 : }
773 60 : reg[ dst ] = fd_vm_mem_ld_4( haddr );
774 60 : }
775 60 : FD_VM_INTERP_INSTR_END;
776 :
777 42 : FD_VM_INTERP_BRANCH_BEGIN(0x8d) { /* FD_SBPF_OP_CALL_REG */
778 :
779 42 : FD_VM_INTERP_STACK_PUSH;
780 :
781 42 : ulong vaddr = fd_sbpf_callx_uses_src_reg_enabled( sbpf_version ) ? reg_src : reg[ imm & 15U ];
782 :
783 : /* Notes: Agave checks region and target_pc before updating the pc.
784 : To match their state, we do the same, even though we could simply
785 : update the pc and let BRANCH_END fail.
786 : Also, Agave doesn't check alignment. */
787 :
788 42 : ulong region = vaddr >> 32;
789 : /* ulong align = vaddr & 7UL; */
790 42 : ulong target_pc = ((vaddr & FD_VM_OFFSET_MASK) - vm->text_off) / 8UL;
791 42 : if( FD_UNLIKELY( (region!=1UL) | (target_pc>=text_cnt) ) ) goto sigtextbr; /* Note: untaken branches don't consume BTB */
792 0 : pc = target_pc - 1;
793 :
794 0 : } FD_VM_INTERP_BRANCH_END;
795 :
796 33 : FD_VM_INTERP_INSTR_BEGIN(0x8e) /* FD_SBPF_OP_LMUL32_REG */
797 33 : reg[ dst ] = (ulong)( (uint)reg_dst * (uint)reg_src );
798 33 : FD_VM_INTERP_INSTR_END;
799 :
800 9 : FD_VM_INTERP_INSTR_BEGIN(0x8f) { /* FD_SBPF_OP_STXW */
801 9 : ulong vaddr = reg_dst + offset;
802 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
803 9 : int sigsegv = !haddr;
804 9 : if( FD_UNLIKELY( sigsegv ) ) {
805 6 : vm->segv_vaddr = vaddr;
806 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
807 6 : vm->segv_access_len = 4UL;
808 6 : goto sigsegv;
809 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
810 3 : fd_vm_mem_st_4( haddr, (uint)reg_src );
811 3 : }
812 3 : FD_VM_INTERP_INSTR_END;
813 :
814 : /* 0x90 - 0x9f ******************************************************/
815 :
816 42 : FD_VM_INTERP_INSTR_BEGIN(0x94) /* FD_SBPF_OP_MOD_IMM */
817 42 : reg[ dst ] = (ulong)( (uint)reg_dst % imm );
818 42 : FD_VM_INTERP_INSTR_END;
819 :
820 5853 : FD_VM_INTERP_BRANCH_BEGIN(0x95) /* FD_SBPF_OP_EXIT */
821 5850 : /* Agave JIT VM exit implementation analysis below.
822 5850 :
823 5850 : Agave references:
824 5850 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L503-L509
825 5850 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L697-L702 */
826 5850 : if( FD_UNLIKELY( !frame_cnt ) ) goto sigexit; /* Exit program */
827 0 : frame_cnt--;
828 0 : reg[6] = shadow[ frame_cnt ].r6;
829 0 : reg[7] = shadow[ frame_cnt ].r7;
830 0 : reg[8] = shadow[ frame_cnt ].r8;
831 0 : reg[9] = shadow[ frame_cnt ].r9;
832 0 : reg[10] = shadow[ frame_cnt ].r10;
833 0 : pc = shadow[ frame_cnt ].pc;
834 0 : FD_VM_INTERP_BRANCH_END;
835 :
836 39 : FD_VM_INTERP_INSTR_BEGIN(0x96) /* FD_SBPF_OP_LMUL64_IMM */
837 39 : reg[ dst ] = reg_dst * (ulong)(long)(int)imm;
838 39 : FD_VM_INTERP_INSTR_END;
839 :
840 9 : FD_VM_INTERP_INSTR_BEGIN(0x97) { /* FD_SBPF_OP_STQ */
841 9 : ulong vaddr = reg_dst + offset;
842 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
843 9 : int sigsegv = !haddr;
844 9 : if( FD_UNLIKELY( sigsegv ) ) {
845 6 : vm->segv_vaddr = vaddr;
846 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
847 6 : vm->segv_access_len = 8UL;
848 6 : goto sigsegv;
849 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
850 3 : fd_vm_mem_st_8( haddr, (ulong)(long)(int)imm );
851 3 : }
852 3 : FD_VM_INTERP_INSTR_END;
853 :
854 84 : FD_VM_INTERP_INSTR_BEGIN(0x9c) { /* FD_SBPF_OP_LDXQ */
855 84 : ulong vaddr = reg_src + offset;
856 84 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_ld_sz, 0, 0UL );
857 84 : int sigsegv = !haddr;
858 84 : if( FD_UNLIKELY( sigsegv ) ) {
859 42 : vm->segv_vaddr = vaddr;
860 42 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
861 42 : vm->segv_access_len = 8UL;
862 42 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
863 42 : }
864 42 : reg[ dst ] = fd_vm_mem_ld_8( haddr );
865 42 : }
866 42 : FD_VM_INTERP_INSTR_END;
867 :
868 57 : FD_VM_INTERP_INSTR_BEGIN(0x9e) /* FD_SBPF_OP_LMUL64_REG */
869 57 : reg[ dst ] = reg_dst * reg_src;
870 57 : FD_VM_INTERP_INSTR_END;
871 :
872 21 : FD_VM_INTERP_INSTR_BEGIN(0x9f) { /* FD_SBPF_OP_STXQ */
873 21 : ulong vaddr = reg_dst + offset;
874 21 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
875 21 : int sigsegv = !haddr;
876 21 : if( FD_UNLIKELY( sigsegv ) ) {
877 6 : vm->segv_vaddr = vaddr;
878 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
879 6 : vm->segv_access_len = 8UL;
880 6 : goto sigsegv;
881 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
882 15 : fd_vm_mem_st_8( haddr, reg_src );
883 15 : }
884 15 : FD_VM_INTERP_INSTR_END;
885 :
886 42 : FD_VM_INTERP_INSTR_BEGIN(0x97depr) /* FD_SBPF_OP_MOD64_IMM */
887 42 : reg[ dst ] = reg_dst % (ulong)(long)(int)imm;
888 42 : FD_VM_INTERP_INSTR_END;
889 :
890 57 : FD_VM_INTERP_INSTR_BEGIN(0x9cdepr) /* FD_SBPF_OP_MOD_REG */
891 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
892 42 : reg[ dst ] = (ulong)( ((uint)reg_dst % (uint)reg_src) );
893 42 : FD_VM_INTERP_INSTR_END;
894 :
895 54 : FD_VM_INTERP_INSTR_BEGIN(0x9fdepr) /* FD_SBPF_OP_MOD64_REG */
896 54 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
897 42 : reg[ dst ] = reg_dst % reg_src;
898 42 : FD_VM_INTERP_INSTR_END;
899 :
900 : /* 0xa0 - 0xaf ******************************************************/
901 :
902 9 : FD_VM_INTERP_INSTR_BEGIN(0xa4) /* FD_SBPF_OP_XOR_IMM */
903 9 : reg[ dst ] = (ulong)( (uint)reg_dst ^ imm );
904 9 : FD_VM_INTERP_INSTR_END;
905 :
906 3126 : FD_VM_INTERP_BRANCH_BEGIN(0xa5) /* FD_SBPF_OP_JLT_IMM */
907 3096 : pc += fd_ulong_if( reg_dst<(ulong)(long)(int)imm, offset, 0UL );
908 3096 : FD_VM_INTERP_BRANCH_END;
909 :
910 9 : FD_VM_INTERP_INSTR_BEGIN(0xa7) /* FD_SBPF_OP_XOR64_IMM */
911 9 : reg[ dst ] = reg_dst ^ (ulong)(long)(int)imm;
912 9 : FD_VM_INTERP_INSTR_END;
913 :
914 9 : FD_VM_INTERP_INSTR_BEGIN(0xac) /* FD_SBPF_OP_XOR_REG */
915 9 : reg[ dst ] = (ulong)(uint)( reg_dst ^ reg_src );
916 9 : FD_VM_INTERP_INSTR_END;
917 :
918 2517 : FD_VM_INTERP_BRANCH_BEGIN(0xad) /* FD_SBPF_OP_JLT_REG */
919 2493 : pc += fd_ulong_if( reg_dst<reg_src, offset, 0UL );
920 2493 : FD_VM_INTERP_BRANCH_END;
921 :
922 21 : FD_VM_INTERP_INSTR_BEGIN(0xaf) /* FD_SBPF_OP_XOR64_REG */
923 21 : reg[ dst ] = reg_dst ^ reg_src;
924 21 : FD_VM_INTERP_INSTR_END;
925 :
926 : /* 0xb0 - 0xbf ******************************************************/
927 :
928 330 : FD_VM_INTERP_INSTR_BEGIN(0xb4) /* FD_SBPF_OP_MOV_IMM */
929 330 : reg[ dst ] = (ulong)imm;
930 330 : FD_VM_INTERP_INSTR_END;
931 :
932 6126 : FD_VM_INTERP_BRANCH_BEGIN(0xb5) /* FD_SBPF_OP_JLE_IMM */
933 6066 : pc += fd_ulong_if( reg_dst<=(ulong)(long)(int)imm, offset, 0UL );
934 6066 : FD_VM_INTERP_BRANCH_END;
935 :
936 3 : FD_VM_INTERP_INSTR_BEGIN(0xb6) /* FD_SBPF_OP_SHMUL64_IMM */
937 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)(int)imm ) >> 64 );
938 3 : FD_VM_INTERP_INSTR_END;
939 :
940 60132 : FD_VM_INTERP_INSTR_BEGIN(0xb7) /* FD_SBPF_OP_MOV64_IMM */
941 60132 : reg[ dst ] = (ulong)(long)(int)imm;
942 60132 : FD_VM_INTERP_INSTR_END;
943 :
944 3 : FD_VM_INTERP_INSTR_BEGIN(0xbc) /* FD_SBPF_OP_MOV_REG */
945 3 : reg[ dst ] = (ulong)(long)(int)reg_src;
946 3 : FD_VM_INTERP_INSTR_END;
947 :
948 15 : FD_VM_INTERP_INSTR_BEGIN(0xbcdepr) /* FD_SBPF_OP_MOV_REG deprecated SIMD-1074 */
949 15 : reg[ dst ] = (ulong)(uint)reg_src;
950 15 : FD_VM_INTERP_INSTR_END;
951 :
952 4917 : FD_VM_INTERP_BRANCH_BEGIN(0xbd) /* FD_SBPF_OP_JLE_REG */
953 4869 : pc += fd_ulong_if( reg_dst<=reg_src, offset, 0UL );
954 4869 : FD_VM_INTERP_BRANCH_END;
955 :
956 3 : FD_VM_INTERP_INSTR_BEGIN(0xbe) /* FD_SBPF_OP_SHMUL64_REG */
957 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)reg_src ) >> 64 );
958 3 : FD_VM_INTERP_INSTR_END;
959 :
960 60036 : FD_VM_INTERP_INSTR_BEGIN(0xbf) /* FD_SBPF_OP_MOV64_REG */
961 60036 : reg[ dst ] = reg_src;
962 60036 : FD_VM_INTERP_INSTR_END;
963 :
964 : /* 0xc0 - 0xcf ******************************************************/
965 :
966 147 : FD_VM_INTERP_INSTR_BEGIN(0xc4) /* FD_SBPF_OP_ARSH_IMM */
967 147 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, imm ) );
968 147 : FD_VM_INTERP_INSTR_END;
969 :
970 3102 : FD_VM_INTERP_BRANCH_BEGIN(0xc5) /* FD_SBPF_OP_JSLT_IMM */ /* FIXME: CHECK IMM SIGN EXTENSION */
971 3072 : pc += fd_ulong_if( (long)reg_dst<(long)(int)imm, offset, 0UL );
972 3072 : FD_VM_INTERP_BRANCH_END;
973 :
974 45 : FD_VM_INTERP_INSTR_BEGIN(0xc6) /* FD_SBPF_OP_SDIV32_IMM */
975 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
976 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)imm );
977 39 : FD_VM_INTERP_INSTR_END;
978 :
979 135 : FD_VM_INTERP_INSTR_BEGIN(0xc7) /* FD_SBPF_OP_ARSH64_IMM */
980 135 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, imm ) );
981 135 : FD_VM_INTERP_INSTR_END;
982 :
983 96 : FD_VM_INTERP_INSTR_BEGIN(0xcc) /* FD_SBPF_OP_ARSH_REG */
984 96 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, (uint)reg_src ) );
985 96 : FD_VM_INTERP_INSTR_END;
986 :
987 3108 : FD_VM_INTERP_BRANCH_BEGIN(0xcd) /* FD_SBPF_OP_JSLT_REG */
988 3078 : pc += fd_ulong_if( (long)reg_dst<(long)reg_src, offset, 0UL );
989 3078 : FD_VM_INTERP_BRANCH_END;
990 :
991 54 : FD_VM_INTERP_INSTR_BEGIN(0xce) /* FD_SBPF_OP_SDIV32_REG */
992 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
993 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
994 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)reg_src );
995 36 : FD_VM_INTERP_INSTR_END;
996 :
997 93 : FD_VM_INTERP_INSTR_BEGIN(0xcf) /* FD_SBPF_OP_ARSH64_REG */
998 93 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, reg_src ) );
999 93 : FD_VM_INTERP_INSTR_END;
1000 :
1001 : /* 0xd0 - 0xdf ******************************************************/
1002 :
1003 21 : FD_VM_INTERP_INSTR_BEGIN(0xd4) /* FD_SBPF_OP_END_LE */
1004 21 : switch( imm ) {
1005 9 : case 16U: reg[ dst ] = (ushort)reg_dst; break;
1006 3 : case 32U: reg[ dst ] = (uint) reg_dst; break;
1007 3 : case 64U: break;
1008 6 : default: goto siginv;
1009 21 : }
1010 15 : FD_VM_INTERP_INSTR_END;
1011 :
1012 2460 : FD_VM_INTERP_BRANCH_BEGIN(0xd5) /* FD_SBPF_OP_JSLE_IMM */
1013 2436 : pc += fd_ulong_if( (long)reg_dst<=(long)(int)imm, offset, 0UL );
1014 2436 : FD_VM_INTERP_BRANCH_END;
1015 :
1016 42 : FD_VM_INTERP_INSTR_BEGIN(0xd6) /* FD_SBPF_OP_SDIV64_IMM */
1017 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1018 39 : reg[ dst ] = (ulong)( (long)reg_dst / (long)(int)imm );
1019 39 : FD_VM_INTERP_INSTR_END;
1020 :
1021 75 : FD_VM_INTERP_INSTR_BEGIN(0xdc) /* FD_SBPF_OP_END_BE */
1022 75 : switch( imm ) {
1023 42 : case 16U: reg[ dst ] = (ulong)fd_ushort_bswap( (ushort)reg_dst ); break;
1024 12 : case 32U: reg[ dst ] = (ulong)fd_uint_bswap ( (uint) reg_dst ); break;
1025 9 : case 64U: reg[ dst ] = fd_ulong_bswap ( (ulong) reg_dst ); break;
1026 12 : default: goto siginv;
1027 75 : }
1028 63 : FD_VM_INTERP_INSTR_END;
1029 :
1030 1854 : FD_VM_INTERP_BRANCH_BEGIN(0xdd) /* FD_SBPF_OP_JSLE_REG */
1031 1836 : pc += fd_ulong_if( (long)reg_dst<=(long)reg_src, offset, 0UL );
1032 1836 : FD_VM_INTERP_BRANCH_END;
1033 :
1034 48 : FD_VM_INTERP_INSTR_BEGIN(0xde) /* FD_SBPF_OP_SDIV64_REG */
1035 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1036 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1037 36 : reg[ dst ] = (ulong)( (long)reg_dst / (long)reg_src );
1038 36 : FD_VM_INTERP_INSTR_END;
1039 :
1040 : /* 0xe0 - 0xef ******************************************************/
1041 :
1042 45 : FD_VM_INTERP_INSTR_BEGIN(0xe6) /* FD_SBPF_OP_SREM32_IMM */
1043 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1044 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)imm );
1045 39 : FD_VM_INTERP_INSTR_END;
1046 :
1047 54 : FD_VM_INTERP_INSTR_BEGIN(0xee) /* FD_SBPF_OP_SREM32_REG */
1048 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1049 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1050 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)reg_src );
1051 36 : FD_VM_INTERP_INSTR_END;
1052 :
1053 : /* 0xf0 - 0xff ******************************************************/
1054 :
1055 42 : FD_VM_INTERP_INSTR_BEGIN(0xf6) /* FD_SBPF_OP_SREM64_IMM */
1056 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1057 39 : reg[ dst ] = (ulong)( (long)reg_dst % (long)(int)imm );
1058 39 : FD_VM_INTERP_INSTR_END;
1059 :
1060 21 : FD_VM_INTERP_INSTR_BEGIN(0xf7) /* FD_SBPF_OP_HOR64 */
1061 21 : reg[ dst ] = reg_dst | (((ulong)imm) << 32);
1062 21 : FD_VM_INTERP_INSTR_END;
1063 :
1064 48 : FD_VM_INTERP_INSTR_BEGIN(0xfe) /* FD_SBPF_OP_SREM64_REG */
1065 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1066 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1067 36 : reg[ dst ] = (ulong)( (long)reg_dst % (long)reg_src );
1068 36 : FD_VM_INTERP_INSTR_END;
1069 :
1070 : /* FIXME: sigbus/sigrdonly are mapped to sigsegv for simplicity
1071 : currently but could be enabled if desired. */
1072 :
1073 : /* Note: sigtextbr is for sigtext errors that occur on branching
1074 : instructions (i.e., prefixed with FD_VM_INTERP_BRANCH_BEGIN).
1075 : We skip a repeat ic accumulation in FD_VM_INTERP_FAULT */
1076 :
1077 : /* FD_VM_INTERP_FAULT accumulates to ic and cu all non-faulting
1078 : instructions preceeding a fault generated by a non-branching
1079 : instruction. When a non-branching instruction faults, pc is at the
1080 : instruction and the number of non-branching instructions that have
1081 : not yet been reflected in ic and cu is:
1082 :
1083 : pc - pc0 + 1 - ic_correction
1084 :
1085 : as per the accounting described above. +1 to include the faulting
1086 : instruction itself.
1087 :
1088 : Note that, for a sigtext caused by a branch instruction, pc0==pc
1089 : (from the BRANCH_END) and ic_correction==0 (from the BRANCH_BEGIN)
1090 : such that the below does not change the already current values in
1091 : ic and cu. Thus it also "does the right thing" in both the
1092 : non-branching and branching cases for sigtext. The same applies to
1093 : sigsplit. */
1094 :
1095 0 : #define FD_VM_INTERP_FAULT \
1096 1626 : ic_correction = pc - pc0 + 1UL - ic_correction; \
1097 1626 : ic += ic_correction; \
1098 1626 : if ( FD_UNLIKELY( ic_correction > cu ) ) err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; \
1099 1626 : cu -= fd_ulong_min( ic_correction, cu )
1100 :
1101 78 : sigtext: err = FD_VM_ERR_EBPF_EXECUTION_OVERRUN; FD_VM_INTERP_FAULT; goto interp_halt;
1102 42 : sigtextbr: err = FD_VM_ERR_EBPF_CALL_OUTSIDE_TEXT_SEGMENT; /* ic current */ /* cu current */ goto interp_halt;
1103 0 : sigstack: err = FD_VM_ERR_EBPF_CALL_DEPTH_EXCEEDED; /* ic current */ /* cu current */ goto interp_halt;
1104 1176 : sigill: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; FD_VM_INTERP_FAULT; goto interp_halt;
1105 6 : sigillbr: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1106 18 : siginv: err = FD_VM_ERR_EBPF_INVALID_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1107 198 : sigsegv: err = fd_vm_generate_access_violation( vm->segv_vaddr, vm->sbpf_version ); FD_VM_INTERP_FAULT; goto interp_halt;
1108 681 : sigcost: err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; /* ic current */ cu = 0UL; goto interp_halt;
1109 0 : sigsyscall: err = FD_VM_ERR_EBPF_SYSCALL_ERROR; /* ic current */ /* cu current */ goto interp_halt;
1110 138 : sigfpe: err = FD_VM_ERR_EBPF_DIVIDE_BY_ZERO; FD_VM_INTERP_FAULT; goto interp_halt;
1111 36 : sigfpeof: err = FD_VM_ERR_EBPF_DIVIDE_OVERFLOW; FD_VM_INTERP_FAULT; goto interp_halt;
1112 5850 : sigexit: /* err current */ /* ic current */ /* cu current */ goto interp_halt;
1113 :
1114 0 : #undef FD_VM_INTERP_FAULT
1115 :
1116 8223 : interp_halt:
1117 :
1118 : /* Pack the unpacked execution state into vm to give a precise view of
1119 : the execution when the vm halted. */
1120 :
1121 8223 : vm->pc = pc;
1122 8223 : vm->ic = ic;
1123 8223 : vm->cu = cu;
1124 8223 : vm->frame_cnt = frame_cnt;
1125 :
1126 8223 : # undef FD_VM_INTERP_STACK_PUSH
1127 :
1128 8223 : # undef FD_VM_INTERP_BRANCH_END
1129 8223 : # undef FD_VM_INTERP_BRANCH_BEGIN
1130 :
1131 8223 : # undef FD_VM_INTERP_INSTR_END
1132 8223 : # undef FD_VM_INTERP_INSTR_BEGIN
1133 8223 : # undef FD_VM_INTERP_INSTR_EXEC
1134 :
1135 8223 : # if defined(__clang__)
1136 8223 : # pragma clang diagnostic pop
1137 8223 : # endif
1138 :
1139 8223 : # if defined(__GNUC__)
1140 8223 : # pragma GCC diagnostic pop
1141 8223 : # endif
1142 :
1143 : /* Agave/JIT CU model analysis (and why we are conformant!):
1144 :
1145 : The Agave JIT employs a similar strategy of accumulating instructions
1146 : in a linear run and processing them at the start of a new linear
1147 : run/branch (side note: the JIT treats the LDQ instruction as a "branch"
1148 : that jumps pc + 2).
1149 :
1150 : In what is assumed to be an act of register conservation, the JIT
1151 : uses a catch-all "instruction meter" (IM) register (REGISTER_INSTRUCTION_METER)
1152 : that represents two different interpretations of the question
1153 : "how many instructions can I execute?".
1154 :
1155 : The IM, depending on where we are in the execution, either represents:
1156 : 1. IM => The number of instructions remaining before exhausting CU
1157 : budget. This is analagous to vm->cu in our interpreter.
1158 : 2. IM' => The last pc you can execute in the current linear run before
1159 : exhausting CU budget. Mathematically, IM' = IM + pc0
1160 : where pc0, just like our definition, is the start of the linear run.
1161 :
1162 : Note: IM' can go past the actual basic block/segment. In-fact,
1163 : it typically does, and implies we can execute the full block without
1164 : exhausting CU budget (reminder that LDQ is treated as a branch).
1165 :
1166 : By default, the IM' form is used during execution. The IM form is used:
1167 : - (transiently) during the processing of a branch instruction
1168 : - in post-VM cleanup (updates EbpfVm::previous_instruction_meter).
1169 :
1170 : When a branch instruction is encountered, the JIT checks
1171 : for CU exhaustion with pc > IM', and throws an exception if so. This is valid,
1172 : because as described above, IM' is the largest PC you can reach.
1173 :
1174 : If we haven't exhausted our CU limit, it updates IM':
1175 : 1. IM = IM' - (pc + 1) # Note that IM' at this point is IM + pc0',
1176 : # where pc0' is the start of the current linear run.
1177 : 2. IM' = IM + pc0 # pc0 is the start of the new linear run (typically the target pc)
1178 :
1179 : Code (that does the above in one ALU instruction):
1180 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L891
1181 :
1182 :
1183 : ### How does this relate to our interpreter?
1184 :
1185 : This process is similar to FD_VM_INTERP_BRANCH_BEGIN.
1186 : We just deal with the IM form throughout (with vm->cu and ic_correction).
1187 : If we break down step 1 from above with what we know about IM and IM',
1188 : we get the following:
1189 : 1. IM = IM' - (pc + 1)
1190 : IM = (IM + pc0') - (pc + 1)
1191 : IM = IM + (pc0' - (pc + 1))
1192 : IM = IM - ((pc + 1) - pc0')
1193 : IM = IM - ic_correction
1194 : Here, ((pc + 1) - pc0') is the number of instrutions executed in the current
1195 : linear run. This is the same as our ic_correction(*) in FD_VM_INTERP_BRANCH_BEGIN.
1196 :
1197 : If we replace IM with cu, this effectively becomes the
1198 : cu -= ic_correction
1199 : line in FD_VM_INTERP_BRANCH_BEGIN.
1200 :
1201 : (*) Note: ic_correction (also) takes two forms. It is either the instruction
1202 : accumulator or the number of instructions executed in the current linear run.
1203 : It (transiently) takes the latter form during FD_VM_INTERP_BRANCH_BEGIN and
1204 : FD_VM_INTERP_FAULT, and the former form otherwise.
1205 : */
1206 :
1207 : /* (WIP) Precise faulting and the Agave JIT:
1208 :
1209 : Since the cost model is a part of consensus, we need to conform with the Agave/JIT
1210 : cost model 1:1. To achieve that, our faulting model also needs to match precisely. This
1211 : section covers the various faults that the respective VMs implement and how they match.
1212 :
1213 : # Normal VM exit (sigexit):
1214 : VM exit instruction entrypoint: https://github.com/solana-labs/rbpf/blob/12237895305ab38514be865ebed6268553e4f589/src/jit.rs#L698-L708
1215 :
1216 : Pseudocode (with FD semantics):
1217 : ```
1218 : # pc is at the exit instruction
1219 : # pc0 is the start of the current linear run
1220 : if (frame_cnt == 0) {
1221 : goto sigexit;
1222 : }
1223 : ...
1224 :
1225 : sigexit:
1226 : if IM' <= pc {
1227 : goto sigcost;
1228 : } else {
1229 : goto interp_halt;
1230 : }
1231 : ```
1232 :
1233 : Breaking down the IM' < pc check:
1234 : - IM' = IM + pc0
1235 : - pc = ic + pc0, where (ic + 1) is the number of instructions executed in the current linear run
1236 :
1237 : IM' <= pc
1238 : IM + pc0 <= ic + pc0
1239 : IM <= ic
1240 : IM <= pc - pc0
1241 : IM < pc - pc0 + 1 # all unsigned integers
1242 : IM < ic_correction
1243 :
1244 : This is analagous to the ic_correction>cu check in VM_INTERP_BRANCH_BEGIN.
1245 :
1246 : # (TODO) Text Overrun (sigtext/sigsplit):
1247 :
1248 : */
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