Line data Source code
1 : /* This is the VM SBPF interpreter core. The caller unpacks the VM
2 : state and then just lets execution continue into this (or jumps to
3 : interp_exec) to start running. The VM will run until it halts or
4 : faults. On normal termination, it will branch to interp_halt to
5 : exit. Each fault has its own exit label to allow the caller to
6 : handle individually. */
7 :
8 : /* FIXME: SIGILLS FOR VARIOUS THINGS THAT HAVE UNNECESSARY BITS IN IMM
9 : SET? (LIKE WIDE SHIFTS?) */
10 :
11 0 : # if defined(__GNUC__) /* -Wpedantic rejects labels as values and rejects goto *expr */
12 0 : # pragma GCC diagnostic push
13 0 : # pragma GCC diagnostic ignored "-Wpedantic"
14 0 : # endif
15 :
16 0 : # if defined(__clang__) /* Clang is differently picky about labels as values and goto *expr */
17 0 : # pragma clang diagnostic push
18 0 : # pragma clang diagnostic ignored "-Wpedantic"
19 0 : # pragma clang diagnostic ignored "-Wgnu-label-as-value"
20 0 : # endif
21 :
22 : /* Include the jump table */
23 :
24 7779 : # include "fd_vm_interp_jump_table.c"
25 :
26 : /* Update the jump table based on SBPF version */
27 :
28 0 : ulong sbpf_version = vm->sbpf_version;
29 :
30 : /* Unpack the VM state */
31 :
32 0 : ulong pc = vm->pc;
33 0 : ulong ic = vm->ic;
34 0 : ulong cu = vm->cu;
35 0 : ulong frame_cnt = vm->frame_cnt;
36 :
37 0 : void const * const * const version_interp_jump_table = interp_jump_table[ sbpf_version ];
38 :
39 : /* FD_VM_INTERP_INSTR_EXEC loads the first word of the instruction at
40 : pc, parses it, fetches the associated register values and then
41 : jumps to the code that executes the instruction. On normal
42 : instruction execution, the pc will be updated and
43 : FD_VM_INTERP_INSTR_EXEC will be invoked again to do the next
44 : instruction. After a normal halt, this will branch to interp_halt.
45 : Otherwise, it will branch to the appropriate normal termination. */
46 :
47 0 : ulong instr;
48 0 : ulong opcode;
49 0 : ulong dst;
50 0 : ulong src;
51 0 : ulong offset; /* offset is 16-bit but always sign extended, so we handle cast once */
52 0 : uint imm;
53 0 : ulong reg_dst;
54 0 : ulong reg_src;
55 :
56 : /* These mimic the exact Rust semantics for wrapping_shl and wrapping_shr. */
57 :
58 : /* u64::wrapping_shl: a.unchecked_shl(b & (64 - 1))
59 :
60 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shl
61 : */
62 459 : #define FD_RUST_ULONG_WRAPPING_SHL( a, b ) (a << ( b & ( 63 ) ))
63 :
64 : /* u64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
65 :
66 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shr
67 : */
68 21 : #define FD_RUST_ULONG_WRAPPING_SHR( a, b ) (a >> ( b & ( 63 ) ))
69 :
70 : /* u32::wrapping_shl: a.unchecked_shl(b & (32 - 1))
71 :
72 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shl
73 : */
74 900 : #define FD_RUST_UINT_WRAPPING_SHL( a, b ) (a << ( b & ( 31 ) ))
75 :
76 : /* u32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
77 :
78 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shr
79 : */
80 18 : #define FD_RUST_UINT_WRAPPING_SHR( a, b ) (a >> ( b & ( 31 ) ))
81 :
82 :
83 0 : # define FD_VM_INTERP_INSTR_EXEC \
84 381945 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext; /* Note: untaken branches don't consume BTB */ \
85 381945 : instr = text[ pc ]; /* Guaranteed in-bounds */ \
86 381843 : opcode = fd_vm_instr_opcode( instr ); /* in [0,256) even if malformed */ \
87 381843 : dst = fd_vm_instr_dst ( instr ); /* in [0, 16) even if malformed */ \
88 381843 : src = fd_vm_instr_src ( instr ); /* in [0, 16) even if malformed */ \
89 381843 : offset = fd_vm_instr_offset( instr ); /* in [-2^15,2^15) even if malformed */ \
90 381843 : imm = fd_vm_instr_imm ( instr ); /* in [0,2^32) even if malformed */ \
91 381843 : reg_dst = reg[ dst ]; /* Guaranteed in-bounds */ \
92 381843 : reg_src = reg[ src ]; /* Guaranteed in-bounds */ \
93 381843 : goto *version_interp_jump_table[ opcode ] /* Guaranteed in-bounds */
94 :
95 : /* FD_VM_INTERP_SYSCALL_EXEC
96 : (macro to handle the logic of 0x85 pre- and post- SIMD-0178: static syscalls)
97 :
98 : Setup.
99 : Update the vm with the current vm execution state for the
100 : syscall. Note that BRANCH_BEGIN has pc at the syscall and
101 : already updated ic and cu to reflect all instructions up to
102 : and including the syscall instruction itself.
103 :
104 : Execution.
105 : Do the syscall. We use ret reduce the risk of the syscall
106 : accidentally modifying other registers (note however since a
107 : syscall has the vm handle it still do arbitrary modifications
108 : to the vm state) and the risk of a pointer escape on reg from
109 : inhibiting compiler optimizations (this risk is likely low in
110 : as this is the only point in the whole interpreter core that
111 : calls outside this translation unit).
112 : At this point, vm->cu is positive.
113 :
114 : Error handling.
115 : If we trust syscall implementations to handle the vm state
116 : correctly, the below could be implemented as unpacking the vm
117 : state and jumping to sigsys on error. But we provide some
118 : extra protection to make various strong guarantees:
119 :
120 : - We do not let the syscall modify pc currently as nothing
121 : requires this and it reduces risk of a syscall bug mucking
122 : up the interpreter. If there ever was a syscall that
123 : needed to modify the pc (e.g. a syscall that has execution
124 : resume from a different location than the instruction
125 : following the syscall), do "pc = vm->pc" below.
126 :
127 : - We do not let the syscall modify ic currently as nothing
128 : requires this and it keeps the ic precise. If a future
129 : syscall needs this, do "ic = vm->ic" below.
130 :
131 : - We do not let the syscall increase cu as nothing requires
132 : this and it guarantees the interpreter will halt in a
133 : reasonable finite amount of time. If a future syscall
134 : needs this, do "cu = vm->cu" below.
135 :
136 : - A syscall that returns SIGCOST is always treated as though
137 : it also zerod cu.
138 :
139 : At this point, vm->cu is whatever the syscall tried to set
140 : and cu is positive.
141 :
142 : Exit
143 : At this point, cu is positive and err is clear.
144 : */
145 :
146 0 : # if FD_HAS_FLATCC
147 0 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP \
148 : /* Dumping for debugging purposes */ \
149 3 : if( FD_UNLIKELY( vm->dump_syscall_to_pb ) ) { \
150 0 : fd_dump_vm_syscall_to_protobuf( vm, syscall->name ); \
151 0 : }
152 : # else
153 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP
154 : # endif
155 0 : # define FD_VM_INTERP_SYSCALL_EXEC \
156 : /* Setup */ \
157 3 : vm->pc = pc; \
158 3 : vm->ic = ic; \
159 3 : vm->cu = cu; \
160 3 : vm->frame_cnt = frame_cnt; \
161 3 : FD_VM_INTERP_SYSCALL_EXEC_DUMP \
162 : /* Execution */ \
163 3 : ulong ret[1]; \
164 3 : err = syscall->func( vm, reg[1], reg[2], reg[3], reg[4], reg[5], ret ); \
165 3 : reg[0] = ret[0]; \
166 : /* Error handling */ \
167 3 : ulong cu_req = vm->cu; \
168 3 : cu = fd_ulong_min( cu_req, cu ); \
169 3 : if( FD_UNLIKELY( err ) ) { \
170 0 : if( err==FD_VM_SYSCALL_ERR_COMPUTE_BUDGET_EXCEEDED ) cu = 0UL; /* cmov */ \
171 0 : FD_VM_TEST_ERR_EXISTS( vm ); \
172 0 : goto sigsyscall; \
173 0 : } \
174 : /* Exit */
175 :
176 :
177 : /* FD_VM_INTERP_INSTR_BEGIN / FD_VM_INTERP_INSTR_END bracket opcode's
178 : implementation for an opcode that does not branch. On entry, the
179 : instruction word has been unpacked into dst / src / offset / imm
180 : and reg[dst] / reg[src] has been prefetched into reg_dst / reg_src. */
181 :
182 245271 : # define FD_VM_INTERP_INSTR_BEGIN(opcode) interp_##opcode:
183 :
184 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~0.3% faster in some benchmarks, slower in others but more code footprint */
185 244899 : # define FD_VM_INTERP_INSTR_END pc++; FD_VM_INTERP_INSTR_EXEC
186 : # else /* Use this version when tracing or optimizing code footprint */
187 0 : # define FD_VM_INTERP_INSTR_END pc++; goto interp_exec
188 : # endif
189 :
190 : /* Instead of doing a lot of compute budget calcs and tests every
191 : instruction, we note that the program counter increases
192 : monotonically after a branch (or a program start) until the next
193 : branch (or program termination). We save the program counter of
194 : the start of such a segment in pc0. Whenever we encounter a branch
195 : (or a program termination) at pc, we know we processed pc-pc0+1
196 : text words (including the text word for the branch instruction
197 : itself as all branch instructions are single word).
198 :
199 : Each instruction costs 1 cu (syscalls can cost extra on top of
200 : this that is accounted separately in CALL_IMM below). Since there
201 : could have been multiword instructions in this segment, at start of
202 : such a segment, we zero out the accumulator ic_correction and have
203 : every multiword instruction in the segment accumulate the number of
204 : extra text words it has to this variable. (Sigh ... it would be a
205 : lot simpler to bill based on text words processed but this would be
206 : very difficult to make this protocol change at this point.)
207 :
208 : When we encounter a branch at pc, the number of instructions
209 : processed (and thus the number of compute units to bill for that
210 : segment) is thus:
211 :
212 : pc - pc0 + 1 - ic_correction
213 :
214 : IMPORTANT SAFETY TIP! This implies the worst case interval before
215 : checking the cu budget is the worst case text_cnt. But since all
216 : such instructions are cheap 1 cu instructions and processed fast
217 : and text max is limited in size, this should be acceptable in
218 : practice. FIXME: DOUBLE CHECK THE MATH ABOVE AGAINST PROTOCOL
219 : LIMITS. */
220 :
221 0 : ulong pc0 = pc;
222 0 : ulong ic_correction = 0UL;
223 :
224 0 : # define FD_VM_INTERP_BRANCH_BEGIN(opcode) \
225 135396 : interp_##opcode: \
226 : /* Bill linear text segment and this branch instruction as per the above */ \
227 135396 : ic_correction = pc - pc0 + 1UL - ic_correction; \
228 135396 : ic += ic_correction; \
229 135396 : if( FD_UNLIKELY( ic_correction>cu ) ) goto sigcost; /* Note: untaken branches don't consume BTB */ \
230 135396 : cu -= ic_correction; \
231 : /* At this point, cu>=0 */ \
232 134715 : ic_correction = 0UL;
233 :
234 : /* FIXME: debatable if it is better to do pc++ here or have the
235 : instruction implementations do it in their code path. */
236 :
237 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~4% faster in some benchmarks, slower in others but more code footprint */
238 : # define FD_VM_INTERP_BRANCH_END \
239 129261 : pc++; \
240 129261 : pc0 = pc; /* Start a new linear segment */ \
241 129267 : FD_VM_INTERP_INSTR_EXEC
242 : # else /* Use this version when tracing or optimizing code footprint */
243 : # define FD_VM_INTERP_BRANCH_END \
244 0 : pc++; \
245 0 : pc0 = pc; /* Start a new linear segment */ \
246 : /* FIXME: TEST sigsplit HERE */ \
247 0 : goto interp_exec
248 : # endif
249 :
250 : /* FD_VM_INTERP_STACK_PUSH pushes reg[6:9] onto the shadow stack and
251 : advances reg[10] to a new user stack frame. If there are no more
252 : stack frames available, will do a SIGSTACK. */
253 :
254 : /* FIXME: double check faulting is desired on stack overflow. */
255 :
256 : /* FIXME: a pre-belt-sanding FIXME implied the TLB should be updated
257 : to prevent byte code from accessing the stack outside its current
258 : stack frame. But this would break the common practice of a
259 : function passing a pointer to something on its stack into a
260 : function that it calls:
261 :
262 : void foo( ... ) {
263 : ...
264 : int ret;
265 : bar( &ret );
266 : ...
267 : }
268 :
269 : So this probably shouldn't be done. But, if it is in fact
270 : necessary, the TLB updates would be here and in pop. */
271 :
272 : /* FIXME: unvalidated code mucking with r10 */
273 :
274 0 : # define FD_VM_INTERP_STACK_PUSH \
275 42 : shadow[ frame_cnt ].r6 = reg[6]; \
276 42 : shadow[ frame_cnt ].r7 = reg[7]; \
277 42 : shadow[ frame_cnt ].r8 = reg[8]; \
278 42 : shadow[ frame_cnt ].r9 = reg[9]; \
279 42 : shadow[ frame_cnt ].r10 = reg[10]; \
280 42 : shadow[ frame_cnt ].pc = pc; \
281 42 : if( FD_UNLIKELY( ++frame_cnt>=frame_max ) ) goto sigstack; /* Note: untaken branches don't consume BTB */ \
282 42 : if( !fd_sbpf_dynamic_stack_frames_enabled( sbpf_version ) ) reg[10] += FD_VM_STACK_FRAME_SZ * 2UL; \
283 0 :
284 : /* We subtract the heap cost in the BPF loader */
285 :
286 0 : goto interp_exec; /* Silly but to avoid unused label warning in some configurations */
287 7779 : interp_exec:
288 :
289 : # ifdef FD_VM_INTERP_EXE_TRACING_ENABLED
290 : /* Note: when tracing or optimizing for code footprint, all
291 : instruction execution starts here such that this is only point
292 : where exe tracing diagnostics are needed. */
293 0 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext;
294 0 : fd_vm_trace_event_exe( vm->trace, pc, ic + ( pc - pc0 - ic_correction ), cu, reg, vm->text + pc, vm->text_cnt - pc, ic_correction, frame_cnt );
295 0 : # endif
296 :
297 7779 : FD_VM_INTERP_INSTR_EXEC;
298 :
299 : /* 0x00 - 0x0f ******************************************************/
300 :
301 7779 : FD_VM_INTERP_INSTR_BEGIN(0x04) /* FD_SBPF_OP_ADD_IMM */
302 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)imm );
303 36 : FD_VM_INTERP_INSTR_END;
304 :
305 45 : FD_VM_INTERP_INSTR_BEGIN(0x04depr) /* FD_SBPF_OP_ADD_IMM deprecated SIMD-0174 */
306 45 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)imm );
307 45 : FD_VM_INTERP_INSTR_END;
308 :
309 639 : FD_VM_INTERP_BRANCH_BEGIN(0x05) /* FD_SBPF_OP_JA */
310 633 : pc += offset;
311 633 : FD_VM_INTERP_BRANCH_END;
312 :
313 30108 : FD_VM_INTERP_INSTR_BEGIN(0x07) /* FD_SBPF_OP_ADD64_IMM */
314 30108 : reg[ dst ] = reg_dst + (ulong)(long)(int)imm;
315 30108 : FD_VM_INTERP_INSTR_END;
316 :
317 33 : FD_VM_INTERP_INSTR_BEGIN(0x0c) /* FD_SBPF_OP_ADD_REG */
318 33 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)reg_src );
319 33 : FD_VM_INTERP_INSTR_END;
320 :
321 39 : FD_VM_INTERP_INSTR_BEGIN(0x0cdepr) /* FD_SBPF_OP_ADD_REG deprecated SIMD-0174 */
322 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)reg_src );
323 39 : FD_VM_INTERP_INSTR_END;
324 :
325 78 : FD_VM_INTERP_INSTR_BEGIN(0x0f) /* FD_SBPF_OP_ADD64_REG */
326 78 : reg[ dst ] = reg_dst + reg_src;
327 78 : FD_VM_INTERP_INSTR_END;
328 :
329 : /* 0x10 - 0x1f ******************************************************/
330 :
331 36 : FD_VM_INTERP_INSTR_BEGIN(0x14) /* FD_SBPF_OP_SUB_IMM */
332 36 : reg[ dst ] = (ulong)(uint)( (int)imm - (int)reg_dst );
333 36 : FD_VM_INTERP_INSTR_END;
334 :
335 39 : FD_VM_INTERP_INSTR_BEGIN(0x14depr) /* FD_SBPF_OP_SUB_IMM deprecated SIMD-0174 */
336 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)imm );
337 39 : FD_VM_INTERP_INSTR_END;
338 :
339 1254 : FD_VM_INTERP_BRANCH_BEGIN(0x15) /* FD_SBPF_OP_JEQ_IMM */
340 1242 : pc += fd_ulong_if( reg_dst==(ulong)(long)(int)imm, offset, 0UL );
341 1242 : FD_VM_INTERP_BRANCH_END;
342 :
343 33 : FD_VM_INTERP_INSTR_BEGIN(0x17) /* FD_SBPF_OP_SUB64_IMM */
344 33 : reg[ dst ] = (ulong)(long)(int)imm - reg_dst;
345 33 : FD_VM_INTERP_INSTR_END;
346 :
347 36 : FD_VM_INTERP_INSTR_BEGIN(0x17depr) /* FD_SBPF_OP_SUB64_IMM deprecated SIMD-0174 */
348 36 : reg[ dst ] = reg_dst - (ulong)(long)(int)imm;
349 36 : FD_VM_INTERP_INSTR_END;
350 :
351 117 : FD_VM_INTERP_INSTR_BEGIN(0x18) /* FD_SBPF_OP_LDQ */
352 117 : pc++;
353 117 : ic_correction++;
354 : /* No need to check pc because it's already checked during validation.
355 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigsplit; // Note: untaken branches don't consume BTB */
356 117 : reg[ dst ] = (ulong)((ulong)imm | ((ulong)fd_vm_instr_imm( text[ pc ] ) << 32));
357 117 : FD_VM_INTERP_INSTR_END;
358 :
359 36 : FD_VM_INTERP_INSTR_BEGIN(0x1c) /* FD_SBPF_OP_SUB_REG */
360 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst - (int)reg_src );
361 36 : FD_VM_INTERP_INSTR_END;
362 :
363 39 : FD_VM_INTERP_INSTR_BEGIN(0x1cdepr) /* FD_SBPF_OP_SUB_REG deprecated SIMD-0174 */
364 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)reg_src );
365 39 : FD_VM_INTERP_INSTR_END;
366 :
367 648 : FD_VM_INTERP_BRANCH_BEGIN(0x1d) /* FD_SBPF_OP_JEQ_REG */
368 642 : pc += fd_ulong_if( reg_dst==reg_src, offset, 0UL );
369 642 : FD_VM_INTERP_BRANCH_END;
370 :
371 30093 : FD_VM_INTERP_INSTR_BEGIN(0x1f) /* FD_SBPF_OP_SUB64_REG */
372 30093 : reg[ dst ] = reg_dst - reg_src;
373 30093 : FD_VM_INTERP_INSTR_END;
374 :
375 : /* 0x20 - 0x2f ******************************************************/
376 :
377 42 : FD_VM_INTERP_INSTR_BEGIN(0x24) /* FD_SBPF_OP_MUL_IMM */
378 42 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)imm );
379 42 : FD_VM_INTERP_INSTR_END;
380 :
381 3126 : FD_VM_INTERP_BRANCH_BEGIN(0x25) /* FD_SBPF_OP_JGT_IMM */
382 3096 : pc += fd_ulong_if( reg_dst>(ulong)(long)(int)imm, offset, 0UL );
383 3096 : FD_VM_INTERP_BRANCH_END;
384 :
385 9 : FD_VM_INTERP_INSTR_BEGIN(0x27) { /* FD_SBPF_OP_STB */
386 9 : ulong vaddr = reg_dst + offset;
387 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
388 9 : if( FD_UNLIKELY( !haddr ) ) {
389 6 : vm->segv_vaddr = vaddr;
390 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
391 6 : vm->segv_access_len = 1UL;
392 6 : goto sigsegv;
393 6 : } /* Note: untaken branches don't consume BTB */
394 3 : fd_vm_mem_st_1( haddr, (uchar)imm );
395 3 : }
396 3 : FD_VM_INTERP_INSTR_END;
397 :
398 78 : FD_VM_INTERP_INSTR_BEGIN(0x2c) { /* FD_SBPF_OP_LDXB */
399 78 : ulong vaddr = reg_src + offset;
400 78 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_ld_sz, 0, 0UL );
401 78 : if( FD_UNLIKELY( !haddr ) ) {
402 24 : vm->segv_vaddr = vaddr;
403 24 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
404 24 : vm->segv_access_len = 1UL;
405 24 : goto sigsegv;
406 24 : } /* Note: untaken branches don't consume BTB */
407 54 : reg[ dst ] = fd_vm_mem_ld_1( haddr );
408 54 : }
409 54 : FD_VM_INTERP_INSTR_END;
410 :
411 3117 : FD_VM_INTERP_BRANCH_BEGIN(0x2d) /* FD_SBPF_OP_JGT_REG */
412 3087 : pc += fd_ulong_if( reg_dst>reg_src, offset, 0UL );
413 3087 : FD_VM_INTERP_BRANCH_END;
414 :
415 9 : FD_VM_INTERP_INSTR_BEGIN(0x2f) { /* FD_SBPF_OP_STXB */
416 9 : ulong vaddr = reg_dst + offset;
417 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
418 9 : if( FD_UNLIKELY( !haddr ) ) {
419 6 : vm->segv_vaddr = vaddr;
420 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
421 6 : vm->segv_access_len = 1UL;
422 6 : goto sigsegv;
423 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigrdonly */
424 3 : fd_vm_mem_st_1( haddr, (uchar)reg_src );
425 3 : }
426 3 : FD_VM_INTERP_INSTR_END;
427 :
428 42 : FD_VM_INTERP_INSTR_BEGIN(0x27depr) /* FD_SBPF_OP_MUL64_IMM */
429 42 : reg[ dst ] = (ulong)( (long)reg_dst * (long)(int)imm );
430 42 : FD_VM_INTERP_INSTR_END;
431 :
432 39 : FD_VM_INTERP_INSTR_BEGIN(0x2cdepr) /* FD_SBPF_OP_MUL_REG */
433 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)reg_src );
434 39 : FD_VM_INTERP_INSTR_END;
435 :
436 30078 : FD_VM_INTERP_INSTR_BEGIN(0x2fdepr) /* FD_SBPF_OP_MUL64_REG */
437 30078 : reg[ dst ] = reg_dst * reg_src;
438 30078 : FD_VM_INTERP_INSTR_END;
439 :
440 : /* 0x30 - 0x3f ******************************************************/
441 :
442 42 : FD_VM_INTERP_INSTR_BEGIN(0x34) /* FD_SBPF_OP_DIV_IMM */
443 42 : /* FIXME: convert to a multiply at validation time (usually probably
444 42 : not worth it) */
445 42 : reg[ dst ] = (ulong)((uint)reg_dst / imm);
446 42 : FD_VM_INTERP_INSTR_END;
447 :
448 6123 : FD_VM_INTERP_BRANCH_BEGIN(0x35) /* FD_SBPF_OP_JGE_IMM */
449 6063 : pc += fd_ulong_if( reg_dst>=(ulong)(long)(int)imm, offset, 0UL );
450 6063 : FD_VM_INTERP_BRANCH_END;
451 :
452 3 : FD_VM_INTERP_INSTR_BEGIN(0x36) /* FD_SBPF_OP_UHMUL64_IMM */
453 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)(ulong)imm ) >> 64 );
454 3 : FD_VM_INTERP_INSTR_END;
455 :
456 9 : FD_VM_INTERP_INSTR_BEGIN(0x37) { /* FD_SBPF_OP_STH */
457 9 : ulong vaddr = reg_dst + offset;
458 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
459 9 : int sigsegv = !haddr;
460 9 : if( FD_UNLIKELY( sigsegv ) ) {
461 6 : vm->segv_vaddr = vaddr;
462 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
463 6 : vm->segv_access_len = 2UL;
464 6 : goto sigsegv;
465 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
466 3 : fd_vm_mem_st_2( haddr, (ushort)imm );
467 3 : }
468 3 : FD_VM_INTERP_INSTR_END;
469 :
470 96 : FD_VM_INTERP_INSTR_BEGIN(0x3c) { /* FD_SBPF_OP_LDXH */
471 96 : ulong vaddr = reg_src + offset;
472 96 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_ld_sz, 0, 0UL );
473 96 : int sigsegv = !haddr;
474 96 : if( FD_UNLIKELY( sigsegv ) ) {
475 36 : vm->segv_vaddr = vaddr;
476 36 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
477 36 : vm->segv_access_len = 2UL;
478 36 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
479 36 : }
480 60 : reg[ dst ] = fd_vm_mem_ld_2( haddr );
481 60 : }
482 60 : FD_VM_INTERP_INSTR_END;
483 :
484 35532 : FD_VM_INTERP_BRANCH_BEGIN(0x3d) /* FD_SBPF_OP_JGE_REG */
485 35478 : pc += fd_ulong_if( reg_dst>=reg_src, offset, 0UL );
486 35478 : FD_VM_INTERP_BRANCH_END;
487 :
488 9 : FD_VM_INTERP_INSTR_BEGIN(0x3f) { /* FD_SBPF_OP_STXH */
489 9 : ulong vaddr = reg_dst + offset;
490 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
491 9 : int sigsegv = !haddr;
492 9 : if( FD_UNLIKELY( sigsegv ) ) {
493 6 : vm->segv_vaddr = vaddr;
494 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
495 6 : vm->segv_access_len = 2UL;
496 6 : goto sigsegv;
497 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
498 3 : fd_vm_mem_st_2( haddr, (ushort)reg_src );
499 3 : }
500 3 : FD_VM_INTERP_INSTR_END;
501 :
502 3 : FD_VM_INTERP_INSTR_BEGIN(0x3e) /* FD_SBPF_OP_UHMUL64_REG */
503 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)reg_src ) >> 64 );
504 3 : FD_VM_INTERP_INSTR_END;
505 :
506 45 : FD_VM_INTERP_INSTR_BEGIN(0x37depr) /* FD_SBPF_OP_DIV64_IMM */
507 45 : reg[ dst ] = reg_dst / (ulong)(long)(int)imm;
508 45 : FD_VM_INTERP_INSTR_END;
509 :
510 57 : FD_VM_INTERP_INSTR_BEGIN(0x3cdepr) /* FD_SBPF_OP_DIV_REG */
511 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
512 42 : reg[ dst ] = (ulong)((uint)reg_dst / (uint)reg_src);
513 42 : FD_VM_INTERP_INSTR_END;
514 :
515 30072 : FD_VM_INTERP_INSTR_BEGIN(0x3fdepr) /* FD_SBPF_OP_DIV64_REG */
516 30072 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
517 30060 : reg[ dst ] = reg_dst / reg_src;
518 30060 : FD_VM_INTERP_INSTR_END;
519 :
520 : /* 0x40 - 0x4f ******************************************************/
521 :
522 51 : FD_VM_INTERP_INSTR_BEGIN(0x44) /* FD_SBPF_OP_OR_IMM */
523 51 : reg[ dst ] = (ulong)( (uint)reg_dst | imm );
524 51 : FD_VM_INTERP_INSTR_END;
525 :
526 1266 : FD_VM_INTERP_BRANCH_BEGIN(0x45) /* FD_SBPF_OP_JSET_IMM */
527 1254 : pc += fd_ulong_if( !!(reg_dst & (ulong)(long)(int)imm), offset, 0UL );
528 1254 : FD_VM_INTERP_BRANCH_END;
529 :
530 39 : FD_VM_INTERP_INSTR_BEGIN(0x46) /* FD_SBPF_OP_UDIV32_IMM */
531 39 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)imm );
532 39 : FD_VM_INTERP_INSTR_END;
533 :
534 51 : FD_VM_INTERP_INSTR_BEGIN(0x47) /* FD_SBPF_OP_OR64_IMM */
535 51 : reg[ dst ] = reg_dst | (ulong)(long)(int)imm;
536 51 : FD_VM_INTERP_INSTR_END;
537 :
538 57 : FD_VM_INTERP_INSTR_BEGIN(0x4c) /* FD_SBPF_OP_OR_REG */
539 57 : reg[ dst ] = (ulong)(uint)( reg_dst | reg_src );
540 57 : FD_VM_INTERP_INSTR_END;
541 :
542 663 : FD_VM_INTERP_BRANCH_BEGIN(0x4d) /* FD_SBPF_OP_JSET_REG */
543 657 : pc += fd_ulong_if( !!(reg_dst & reg_src), offset, 0UL );
544 657 : FD_VM_INTERP_BRANCH_END;
545 :
546 48 : FD_VM_INTERP_INSTR_BEGIN(0x4e) /* FD_SBPF_OP_UDIV32_REG */
547 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
548 36 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)reg_src );
549 36 : FD_VM_INTERP_INSTR_END;
550 :
551 57 : FD_VM_INTERP_INSTR_BEGIN(0x4f) /* FD_SBPF_OP_OR64_REG */
552 57 : reg[ dst ] = reg_dst | reg_src;
553 57 : FD_VM_INTERP_INSTR_END;
554 :
555 : /* 0x50 - 0x5f ******************************************************/
556 :
557 54 : FD_VM_INTERP_INSTR_BEGIN(0x54) /* FD_SBPF_OP_AND_IMM */
558 54 : reg[ dst ] = (ulong)( (uint)reg_dst & imm );
559 54 : FD_VM_INTERP_INSTR_END;
560 :
561 30669 : FD_VM_INTERP_BRANCH_BEGIN(0x55) /* FD_SBPF_OP_JNE_IMM */
562 30663 : pc += fd_ulong_if( reg_dst!=(ulong)(long)(int)imm, offset, 0UL );
563 30663 : FD_VM_INTERP_BRANCH_END;
564 :
565 39 : FD_VM_INTERP_INSTR_BEGIN(0x56) /* FD_SBPF_OP_UDIV64_IMM */
566 39 : reg[ dst ] = reg_dst / (ulong)imm;
567 39 : FD_VM_INTERP_INSTR_END;
568 :
569 63 : FD_VM_INTERP_INSTR_BEGIN(0x57) /* FD_SBPF_OP_AND64_IMM */
570 63 : reg[ dst ] = reg_dst & (ulong)(long)(int)imm;
571 63 : FD_VM_INTERP_INSTR_END;
572 :
573 60 : FD_VM_INTERP_INSTR_BEGIN(0x5c) /* FD_SBPF_OP_AND_REG */
574 60 : reg[ dst ] = (ulong)(uint)( reg_dst & reg_src );
575 60 : FD_VM_INTERP_INSTR_END;
576 :
577 657 : FD_VM_INTERP_BRANCH_BEGIN(0x5d) /* FD_SBPF_OP_JNE_REG */
578 651 : pc += fd_ulong_if( reg_dst!=reg_src, offset, 0UL );
579 651 : FD_VM_INTERP_BRANCH_END;
580 :
581 45 : FD_VM_INTERP_INSTR_BEGIN(0x5e) /* FD_SBPF_OP_UDIV64_REG */
582 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
583 36 : reg[ dst ] = reg_dst / reg_src;
584 36 : FD_VM_INTERP_INSTR_END;
585 :
586 48 : FD_VM_INTERP_INSTR_BEGIN(0x5f) /* FD_SBPF_OP_AND64_REG */
587 48 : reg[ dst ] = reg_dst & reg_src;
588 48 : FD_VM_INTERP_INSTR_END;
589 :
590 : /* 0x60 - 0x6f ******************************************************/
591 :
592 : /* FIXME: CHECK THE CU COST MODEL FOR THESE (IS IT LIKE
593 : FD_VM_CONSUME_MEM AND NOT JUST FIXED) */
594 : /* FIXME: MEM TRACING DIAGNOSTICS GO IN HERE */
595 :
596 453 : FD_VM_INTERP_INSTR_BEGIN(0x64) /* FD_SBPF_OP_LSH_IMM */
597 453 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L291 */
598 453 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, (uint)imm ) );
599 453 : FD_VM_INTERP_INSTR_END;
600 :
601 3702 : FD_VM_INTERP_BRANCH_BEGIN(0x65) /* FD_SBPF_OP_JSGT_IMM */
602 3666 : pc += fd_ulong_if( (long)reg_dst>(long)(int)imm, offset, 0UL );
603 3666 : FD_VM_INTERP_BRANCH_END;
604 :
605 39 : FD_VM_INTERP_INSTR_BEGIN(0x66) /* FD_SBPF_OP_UREM32_IMM */
606 39 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)imm );
607 39 : FD_VM_INTERP_INSTR_END;
608 :
609 450 : FD_VM_INTERP_INSTR_BEGIN(0x67) /* FD_SBPF_OP_LSH64_IMM */
610 450 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L376 */
611 450 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, imm );
612 450 : FD_VM_INTERP_INSTR_END;
613 :
614 447 : FD_VM_INTERP_INSTR_BEGIN(0x6c) /* FD_SBPF_OP_LSH_REG */
615 447 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L292 */
616 447 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, reg_src ) );
617 447 : FD_VM_INTERP_INSTR_END;
618 :
619 3108 : FD_VM_INTERP_BRANCH_BEGIN(0x6d) /* FD_SBPF_OP_JSGT_REG */
620 3078 : pc += fd_ulong_if( (long)reg_dst>(long)reg_src, offset, 0UL );
621 3078 : FD_VM_INTERP_BRANCH_END;
622 :
623 48 : FD_VM_INTERP_INSTR_BEGIN(0x6e) /* FD_SBPF_OP_UREM32_REG */
624 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
625 36 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)reg_src );
626 36 : FD_VM_INTERP_INSTR_END;
627 :
628 9 : FD_VM_INTERP_INSTR_BEGIN(0x6f) /* FD_SBPF_OP_LSH64_REG */
629 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L377 */
630 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, reg_src );
631 9 : FD_VM_INTERP_INSTR_END;
632 :
633 : /* 0x70 - 0x7f ******************************************************/
634 :
635 9 : FD_VM_INTERP_INSTR_BEGIN(0x74) /* FD_SBPF_OP_RSH_IMM */
636 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L293 */
637 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, imm ) );
638 9 : FD_VM_INTERP_INSTR_END;
639 :
640 6714 : FD_VM_INTERP_BRANCH_BEGIN(0x75) /* FD_SBPF_OP_JSGE_IMM */
641 6648 : pc += fd_ulong_if( (long)reg_dst>=(long)(int)imm, offset, 0UL );
642 6648 : FD_VM_INTERP_BRANCH_END;
643 :
644 39 : FD_VM_INTERP_INSTR_BEGIN(0x76) /* FD_SBPF_OP_UREM64_IMM */
645 39 : reg[ dst ] = reg_dst % (ulong)imm;
646 39 : FD_VM_INTERP_INSTR_END;
647 :
648 12 : FD_VM_INTERP_INSTR_BEGIN(0x77) /* FD_SBPF_OP_RSH64_IMM */
649 12 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L378 */
650 12 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, imm );
651 12 : FD_VM_INTERP_INSTR_END;
652 :
653 9 : FD_VM_INTERP_INSTR_BEGIN(0x7c) /* FD_SBPF_OP_RSH_REG */
654 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L294 */
655 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, (uint)reg_src ) );
656 9 : FD_VM_INTERP_INSTR_END;
657 :
658 5508 : FD_VM_INTERP_BRANCH_BEGIN(0x7d) /* FD_SBPF_OP_JSGE_REG */
659 5454 : pc += fd_ulong_if( (long)reg_dst>=(long)reg_src, offset, 0UL );
660 5454 : FD_VM_INTERP_BRANCH_END;
661 :
662 45 : FD_VM_INTERP_INSTR_BEGIN(0x7e) /* FD_SBPF_OP_UREM64_REG */
663 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
664 36 : reg[ dst ] = reg_dst % reg_src;
665 36 : FD_VM_INTERP_INSTR_END;
666 :
667 9 : FD_VM_INTERP_INSTR_BEGIN(0x7f) /* FD_SBPF_OP_RSH64_REG */
668 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L379 */
669 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, reg_src );
670 9 : FD_VM_INTERP_INSTR_END;
671 :
672 : /* 0x80-0x8f ********************************************************/
673 :
674 3 : FD_VM_INTERP_INSTR_BEGIN(0x84) /* FD_SBPF_OP_NEG */
675 3 : reg[ dst ] = (ulong)( -(uint)reg_dst );
676 3 : FD_VM_INTERP_INSTR_END;
677 :
678 0 : FD_VM_INTERP_BRANCH_BEGIN(0x85) /* FD_SBPF_OP_CALL_IMM */
679 0 : /* imm has already been validated */
680 0 : FD_VM_INTERP_STACK_PUSH;
681 0 : pc = (ulong)( (long)pc + (long)(int)imm );
682 0 : FD_VM_INTERP_BRANCH_END;
683 :
684 9 : FD_VM_INTERP_BRANCH_BEGIN(0x85depr) { /* FD_SBPF_OP_CALL_IMM */
685 :
686 9 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
687 9 : if( FD_UNLIKELY( !syscall ) ) { /* Optimize for the syscall case */
688 :
689 : /* Note we do the stack push before updating the pc(*). This implies
690 : that the call stack frame gets allocated _before_ checking if the
691 : call target is valid. It would be fine to switch the order
692 : though such would change the precise faulting semantics of
693 : sigtextbr and sigstack.
694 :
695 : (*)but after checking calldests, see point below. */
696 :
697 : /* Agave's order of checks
698 : (https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L486):
699 : 1. Lookup imm hash in FunctionRegistry (calldests_test is our equivalent)
700 : 2. Push stack frame
701 : 3. Check PC
702 : 4. Update PC
703 :
704 : Following this precisely is impossible as our PC check also
705 : serves as a bounds check for the calldests_test call. So we
706 : have to perform step 3 before step 1. The following
707 : is a best-effort implementation that should match the VM state
708 : in all ways except error code. */
709 :
710 : /* Special case to handle entrypoint.
711 : ebpf::hash_symbol_name(b"entrypoint") = 0xb00c380, and
712 : fd_pchash_inverse( 0xb00c380U ) = 0x71e3cf81U */
713 6 : if( FD_UNLIKELY( imm==0x71e3cf81U ) ) {
714 0 : FD_VM_INTERP_STACK_PUSH;
715 0 : pc = entry_pc - 1;
716 6 : } else {
717 6 : ulong target_pc = (ulong)fd_pchash_inverse( imm );
718 6 : if( FD_UNLIKELY( target_pc>=text_cnt ) ) {
719 6 : goto sigillbr; /* different return between 0x85 and 0x8d */
720 6 : }
721 0 : if( FD_UNLIKELY( !fd_sbpf_calldests_test( calldests, target_pc ) ) ) {
722 0 : goto sigillbr;
723 0 : }
724 0 : FD_VM_INTERP_STACK_PUSH;
725 0 : pc = target_pc - 1;
726 0 : }
727 :
728 6 : } else {
729 :
730 3 : FD_VM_INTERP_SYSCALL_EXEC;
731 :
732 3 : }
733 9 : } FD_VM_INTERP_BRANCH_END;
734 :
735 39 : FD_VM_INTERP_INSTR_BEGIN(0x86) /* FD_SBPF_OP_LMUL32_IMM */
736 39 : reg[ dst ] = (ulong)( (uint)reg_dst * imm );
737 39 : FD_VM_INTERP_INSTR_END;
738 :
739 9 : FD_VM_INTERP_INSTR_BEGIN(0x87) { /* FD_SBPF_OP_STW */
740 9 : ulong vaddr = reg_dst + offset;
741 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
742 9 : int sigsegv = !haddr;
743 9 : if( FD_UNLIKELY( sigsegv ) ) {
744 6 : vm->segv_vaddr = vaddr;
745 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
746 6 : vm->segv_access_len = 4UL;
747 6 : goto sigsegv;
748 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
749 3 : fd_vm_mem_st_4( haddr, imm );
750 3 : } FD_VM_INTERP_INSTR_END;
751 :
752 3 : FD_VM_INTERP_INSTR_BEGIN(0x87depr) /* FD_SBPF_OP_NEG64 deprecated */
753 3 : reg[ dst ] = -reg_dst;
754 3 : FD_VM_INTERP_INSTR_END;
755 :
756 108 : FD_VM_INTERP_INSTR_BEGIN(0x8c) { /* FD_SBPF_OP_LDXW */
757 108 : ulong vaddr = reg_src + offset;
758 108 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_ld_sz, 0, 0UL );
759 108 : int sigsegv = !haddr;
760 108 : if( FD_UNLIKELY( sigsegv ) ) {
761 48 : vm->segv_vaddr = vaddr;
762 48 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
763 48 : vm->segv_access_len = 4UL;
764 48 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
765 48 : }
766 60 : reg[ dst ] = fd_vm_mem_ld_4( haddr );
767 60 : }
768 60 : FD_VM_INTERP_INSTR_END;
769 :
770 0 : FD_VM_INTERP_BRANCH_BEGIN(0x8d) { /* FD_SBPF_OP_CALL_REG */
771 0 : FD_VM_INTERP_STACK_PUSH;
772 0 : ulong target_pc = (reg_src - vm->text_off) / 8UL;
773 0 : if( FD_UNLIKELY( target_pc>=text_cnt ) ) goto sigtextbr;
774 0 : if( FD_UNLIKELY( !fd_sbpf_calldests_test( calldests, target_pc ) ) ) {
775 0 : goto sigillbr;
776 0 : }
777 0 : pc = target_pc - 1;
778 0 : } FD_VM_INTERP_BRANCH_END;
779 :
780 42 : FD_VM_INTERP_BRANCH_BEGIN(0x8ddepr) { /* FD_SBPF_OP_CALL_REG */
781 :
782 42 : FD_VM_INTERP_STACK_PUSH;
783 :
784 42 : ulong vaddr = fd_sbpf_callx_uses_src_reg_enabled( sbpf_version ) ? reg_src : reg[ imm & 15U ];
785 :
786 : /* Notes: Agave checks region and target_pc before updating the pc.
787 : To match their state, we do the same, even though we could simply
788 : update the pc and let BRANCH_END fail.
789 : Also, Agave doesn't check alignment. */
790 :
791 42 : ulong region = vaddr >> 32;
792 : /* ulong align = vaddr & 7UL; */
793 42 : ulong target_pc = ((vaddr & FD_VM_OFFSET_MASK) - vm->text_off) / 8UL;
794 42 : if( FD_UNLIKELY( (region!=1UL) | (target_pc>=text_cnt) ) ) goto sigtextbr; /* Note: untaken branches don't consume BTB */
795 0 : pc = target_pc - 1;
796 :
797 0 : } FD_VM_INTERP_BRANCH_END;
798 :
799 33 : FD_VM_INTERP_INSTR_BEGIN(0x8e) /* FD_SBPF_OP_LMUL32_REG */
800 33 : reg[ dst ] = (ulong)( (uint)reg_dst * (uint)reg_src );
801 33 : FD_VM_INTERP_INSTR_END;
802 :
803 9 : FD_VM_INTERP_INSTR_BEGIN(0x8f) { /* FD_SBPF_OP_STXW */
804 9 : ulong vaddr = reg_dst + offset;
805 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
806 9 : int sigsegv = !haddr;
807 9 : if( FD_UNLIKELY( sigsegv ) ) {
808 6 : vm->segv_vaddr = vaddr;
809 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
810 6 : vm->segv_access_len = 4UL;
811 6 : goto sigsegv;
812 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
813 3 : fd_vm_mem_st_4( haddr, (uint)reg_src );
814 3 : }
815 3 : FD_VM_INTERP_INSTR_END;
816 :
817 : /* 0x90 - 0x9f ******************************************************/
818 :
819 42 : FD_VM_INTERP_INSTR_BEGIN(0x94) /* FD_SBPF_OP_MOD_IMM */
820 42 : reg[ dst ] = (ulong)( (uint)reg_dst % imm );
821 42 : FD_VM_INTERP_INSTR_END;
822 :
823 0 : FD_VM_INTERP_BRANCH_BEGIN(0x95) { /* FD_SBPF_OP_SYSCALL */
824 : /* imm has already been validated */
825 0 : fd_sbpf_syscalls_t const * syscall = fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL );
826 0 : if( FD_UNLIKELY( !syscall ) ) goto sigillbr;
827 :
828 0 : FD_VM_INTERP_SYSCALL_EXEC;
829 :
830 0 : } FD_VM_INTERP_BRANCH_END;
831 :
832 39 : FD_VM_INTERP_INSTR_BEGIN(0x96) /* FD_SBPF_OP_LMUL64_IMM */
833 39 : reg[ dst ] = reg_dst * (ulong)(long)(int)imm;
834 39 : FD_VM_INTERP_INSTR_END;
835 :
836 9 : FD_VM_INTERP_INSTR_BEGIN(0x97) { /* FD_SBPF_OP_STQ */
837 9 : ulong vaddr = reg_dst + offset;
838 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
839 9 : int sigsegv = !haddr;
840 9 : if( FD_UNLIKELY( sigsegv ) ) {
841 6 : vm->segv_vaddr = vaddr;
842 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
843 6 : vm->segv_access_len = 8UL;
844 6 : goto sigsegv;
845 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
846 3 : fd_vm_mem_st_8( haddr, (ulong)(long)(int)imm );
847 3 : }
848 3 : FD_VM_INTERP_INSTR_END;
849 :
850 84 : FD_VM_INTERP_INSTR_BEGIN(0x9c) { /* FD_SBPF_OP_LDXQ */
851 84 : ulong vaddr = reg_src + offset;
852 84 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_ld_sz, 0, 0UL );
853 84 : int sigsegv = !haddr;
854 84 : if( FD_UNLIKELY( sigsegv ) ) {
855 42 : vm->segv_vaddr = vaddr;
856 42 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
857 42 : vm->segv_access_len = 8UL;
858 42 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
859 42 : }
860 42 : reg[ dst ] = fd_vm_mem_ld_8( haddr );
861 42 : }
862 42 : FD_VM_INTERP_INSTR_END;
863 :
864 5409 : FD_VM_INTERP_BRANCH_BEGIN(0x9d) /* FD_SBPF_OP_EXIT */
865 5406 : /* Agave JIT VM exit implementation analysis below.
866 5406 :
867 5406 : Agave references:
868 5406 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L503-L509
869 5406 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L697-L702 */
870 5406 : if( FD_UNLIKELY( !frame_cnt ) ) goto sigexit; /* Exit program */
871 0 : frame_cnt--;
872 0 : reg[6] = shadow[ frame_cnt ].r6;
873 0 : reg[7] = shadow[ frame_cnt ].r7;
874 0 : reg[8] = shadow[ frame_cnt ].r8;
875 0 : reg[9] = shadow[ frame_cnt ].r9;
876 0 : reg[10] = shadow[ frame_cnt ].r10;
877 0 : pc = shadow[ frame_cnt ].pc;
878 0 : FD_VM_INTERP_BRANCH_END;
879 :
880 57 : FD_VM_INTERP_INSTR_BEGIN(0x9e) /* FD_SBPF_OP_LMUL64_REG */
881 57 : reg[ dst ] = reg_dst * reg_src;
882 57 : FD_VM_INTERP_INSTR_END;
883 :
884 9 : FD_VM_INTERP_INSTR_BEGIN(0x9f) { /* FD_SBPF_OP_STXQ */
885 9 : ulong vaddr = reg_dst + offset;
886 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
887 9 : int sigsegv = !haddr;
888 9 : if( FD_UNLIKELY( sigsegv ) ) {
889 6 : vm->segv_vaddr = vaddr;
890 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
891 6 : vm->segv_access_len = 8UL;
892 6 : goto sigsegv;
893 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
894 3 : fd_vm_mem_st_8( haddr, reg_src );
895 3 : }
896 3 : FD_VM_INTERP_INSTR_END;
897 :
898 42 : FD_VM_INTERP_INSTR_BEGIN(0x97depr) /* FD_SBPF_OP_MOD64_IMM */
899 42 : reg[ dst ] = reg_dst % (ulong)(long)(int)imm;
900 42 : FD_VM_INTERP_INSTR_END;
901 :
902 57 : FD_VM_INTERP_INSTR_BEGIN(0x9cdepr) /* FD_SBPF_OP_MOD_REG */
903 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
904 42 : reg[ dst ] = (ulong)( ((uint)reg_dst % (uint)reg_src) );
905 42 : FD_VM_INTERP_INSTR_END;
906 :
907 54 : FD_VM_INTERP_INSTR_BEGIN(0x9fdepr) /* FD_SBPF_OP_MOD64_REG */
908 54 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
909 42 : reg[ dst ] = reg_dst % reg_src;
910 42 : FD_VM_INTERP_INSTR_END;
911 :
912 : /* 0xa0 - 0xaf ******************************************************/
913 :
914 9 : FD_VM_INTERP_INSTR_BEGIN(0xa4) /* FD_SBPF_OP_XOR_IMM */
915 9 : reg[ dst ] = (ulong)( (uint)reg_dst ^ imm );
916 9 : FD_VM_INTERP_INSTR_END;
917 :
918 3126 : FD_VM_INTERP_BRANCH_BEGIN(0xa5) /* FD_SBPF_OP_JLT_IMM */
919 3096 : pc += fd_ulong_if( reg_dst<(ulong)(long)(int)imm, offset, 0UL );
920 3096 : FD_VM_INTERP_BRANCH_END;
921 :
922 9 : FD_VM_INTERP_INSTR_BEGIN(0xa7) /* FD_SBPF_OP_XOR64_IMM */
923 9 : reg[ dst ] = reg_dst ^ (ulong)(long)(int)imm;
924 9 : FD_VM_INTERP_INSTR_END;
925 :
926 9 : FD_VM_INTERP_INSTR_BEGIN(0xac) /* FD_SBPF_OP_XOR_REG */
927 9 : reg[ dst ] = (ulong)(uint)( reg_dst ^ reg_src );
928 9 : FD_VM_INTERP_INSTR_END;
929 :
930 2517 : FD_VM_INTERP_BRANCH_BEGIN(0xad) /* FD_SBPF_OP_JLT_REG */
931 2493 : pc += fd_ulong_if( reg_dst<reg_src, offset, 0UL );
932 2493 : FD_VM_INTERP_BRANCH_END;
933 :
934 21 : FD_VM_INTERP_INSTR_BEGIN(0xaf) /* FD_SBPF_OP_XOR64_REG */
935 21 : reg[ dst ] = reg_dst ^ reg_src;
936 21 : FD_VM_INTERP_INSTR_END;
937 :
938 : /* 0xb0 - 0xbf ******************************************************/
939 :
940 330 : FD_VM_INTERP_INSTR_BEGIN(0xb4) /* FD_SBPF_OP_MOV_IMM */
941 330 : reg[ dst ] = (ulong)imm;
942 330 : FD_VM_INTERP_INSTR_END;
943 :
944 6126 : FD_VM_INTERP_BRANCH_BEGIN(0xb5) /* FD_SBPF_OP_JLE_IMM */
945 6066 : pc += fd_ulong_if( reg_dst<=(ulong)(long)(int)imm, offset, 0UL );
946 6066 : FD_VM_INTERP_BRANCH_END;
947 :
948 3 : FD_VM_INTERP_INSTR_BEGIN(0xb6) /* FD_SBPF_OP_SHMUL64_IMM */
949 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)(int)imm ) >> 64 );
950 3 : FD_VM_INTERP_INSTR_END;
951 :
952 60120 : FD_VM_INTERP_INSTR_BEGIN(0xb7) /* FD_SBPF_OP_MOV64_IMM */
953 60120 : reg[ dst ] = (ulong)(long)(int)imm;
954 60120 : FD_VM_INTERP_INSTR_END;
955 :
956 3 : FD_VM_INTERP_INSTR_BEGIN(0xbc) /* FD_SBPF_OP_MOV_REG */
957 3 : reg[ dst ] = (ulong)(long)(int)reg_src;
958 3 : FD_VM_INTERP_INSTR_END;
959 :
960 15 : FD_VM_INTERP_INSTR_BEGIN(0xbcdepr) /* FD_SBPF_OP_MOV_REG deprecated SIMD-1074 */
961 15 : reg[ dst ] = (ulong)(uint)reg_src;
962 15 : FD_VM_INTERP_INSTR_END;
963 :
964 4917 : FD_VM_INTERP_BRANCH_BEGIN(0xbd) /* FD_SBPF_OP_JLE_REG */
965 4869 : pc += fd_ulong_if( reg_dst<=reg_src, offset, 0UL );
966 4869 : FD_VM_INTERP_BRANCH_END;
967 :
968 3 : FD_VM_INTERP_INSTR_BEGIN(0xbe) /* FD_SBPF_OP_SHMUL64_REG */
969 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)reg_src ) >> 64 );
970 3 : FD_VM_INTERP_INSTR_END;
971 :
972 60036 : FD_VM_INTERP_INSTR_BEGIN(0xbf) /* FD_SBPF_OP_MOV64_REG */
973 60036 : reg[ dst ] = reg_src;
974 60036 : FD_VM_INTERP_INSTR_END;
975 :
976 : /* 0xc0 - 0xcf ******************************************************/
977 :
978 9 : FD_VM_INTERP_INSTR_BEGIN(0xc4) /* FD_SBPF_OP_ARSH_IMM */
979 9 : reg[ dst ] = (ulong)(uint)( (int)reg_dst >> imm ); /* FIXME: WIDE SHIFTS, STRICT SIGN EXTENSION */
980 9 : FD_VM_INTERP_INSTR_END;
981 :
982 3102 : FD_VM_INTERP_BRANCH_BEGIN(0xc5) /* FD_SBPF_OP_JSLT_IMM */ /* FIXME: CHECK IMM SIGN EXTENSION */
983 3072 : pc += fd_ulong_if( (long)reg_dst<(long)(int)imm, offset, 0UL );
984 3072 : FD_VM_INTERP_BRANCH_END;
985 :
986 45 : FD_VM_INTERP_INSTR_BEGIN(0xc6) /* FD_SBPF_OP_SDIV32_IMM */
987 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
988 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)imm );
989 39 : FD_VM_INTERP_INSTR_END;
990 :
991 9 : FD_VM_INTERP_INSTR_BEGIN(0xc7) /* FD_SBPF_OP_ARSH64_IMM */
992 9 : reg[ dst ] = (ulong)( (long)reg_dst >> imm ); /* FIXME: WIDE SHIFTS, STRICT SIGN EXTENSION */
993 9 : FD_VM_INTERP_INSTR_END;
994 :
995 12 : FD_VM_INTERP_INSTR_BEGIN(0xcc) /* FD_SBPF_OP_ARSH_REG */
996 12 : reg[ dst ] = (ulong)(uint)( (int)reg_dst >> (uint)reg_src ); /* FIXME: WIDE SHIFTS, STRICT SIGN EXTENSION */
997 12 : FD_VM_INTERP_INSTR_END;
998 :
999 3108 : FD_VM_INTERP_BRANCH_BEGIN(0xcd) /* FD_SBPF_OP_JSLT_REG */
1000 3078 : pc += fd_ulong_if( (long)reg_dst<(long)reg_src, offset, 0UL );
1001 3078 : FD_VM_INTERP_BRANCH_END;
1002 :
1003 54 : FD_VM_INTERP_INSTR_BEGIN(0xce) /* FD_SBPF_OP_SDIV32_REG */
1004 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1005 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1006 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)reg_src );
1007 36 : FD_VM_INTERP_INSTR_END;
1008 :
1009 9 : FD_VM_INTERP_INSTR_BEGIN(0xcf) /* FD_SBPF_OP_ARSH64_REG */
1010 9 : reg[ dst ] = (ulong)( (long)reg_dst >> reg_src ); /* FIXME: WIDE SHIFTS, STRICT SIGN EXTENSION */
1011 9 : FD_VM_INTERP_INSTR_END;
1012 :
1013 : /* 0xd0 - 0xdf ******************************************************/
1014 :
1015 21 : FD_VM_INTERP_INSTR_BEGIN(0xd4) /* FD_SBPF_OP_END_LE */
1016 21 : switch( imm ) {
1017 9 : case 16U: reg[ dst ] = (ushort)reg_dst; break;
1018 3 : case 32U: reg[ dst ] = (uint) reg_dst; break;
1019 3 : case 64U: break;
1020 6 : default: goto siginv;
1021 21 : }
1022 15 : FD_VM_INTERP_INSTR_END;
1023 :
1024 2460 : FD_VM_INTERP_BRANCH_BEGIN(0xd5) /* FD_SBPF_OP_JSLE_IMM */
1025 2436 : pc += fd_ulong_if( (long)reg_dst<=(long)(int)imm, offset, 0UL );
1026 2436 : FD_VM_INTERP_BRANCH_END;
1027 :
1028 42 : FD_VM_INTERP_INSTR_BEGIN(0xd6) /* FD_SBPF_OP_SDIV64_IMM */
1029 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1030 39 : reg[ dst ] = (ulong)( (long)reg_dst / (long)(int)imm );
1031 39 : FD_VM_INTERP_INSTR_END;
1032 :
1033 75 : FD_VM_INTERP_INSTR_BEGIN(0xdc) /* FD_SBPF_OP_END_BE */
1034 75 : switch( imm ) {
1035 42 : case 16U: reg[ dst ] = (ulong)fd_ushort_bswap( (ushort)reg_dst ); break;
1036 12 : case 32U: reg[ dst ] = (ulong)fd_uint_bswap ( (uint) reg_dst ); break;
1037 9 : case 64U: reg[ dst ] = fd_ulong_bswap ( (ulong) reg_dst ); break;
1038 12 : default: goto siginv;
1039 75 : }
1040 63 : FD_VM_INTERP_INSTR_END;
1041 :
1042 1854 : FD_VM_INTERP_BRANCH_BEGIN(0xdd) /* FD_SBPF_OP_JSLE_REG */
1043 1836 : pc += fd_ulong_if( (long)reg_dst<=(long)reg_src, offset, 0UL );
1044 1836 : FD_VM_INTERP_BRANCH_END;
1045 :
1046 48 : FD_VM_INTERP_INSTR_BEGIN(0xde) /* FD_SBPF_OP_SDIV64_REG */
1047 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1048 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1049 36 : reg[ dst ] = (ulong)( (long)reg_dst / (long)reg_src );
1050 36 : FD_VM_INTERP_INSTR_END;
1051 :
1052 : /* 0xe0 - 0xef ******************************************************/
1053 :
1054 45 : FD_VM_INTERP_INSTR_BEGIN(0xe6) /* FD_SBPF_OP_SREM32_IMM */
1055 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1056 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)imm );
1057 39 : FD_VM_INTERP_INSTR_END;
1058 :
1059 54 : FD_VM_INTERP_INSTR_BEGIN(0xee) /* FD_SBPF_OP_SREM32_REG */
1060 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1061 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1062 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)reg_src );
1063 36 : FD_VM_INTERP_INSTR_END;
1064 :
1065 : /* 0xf0 - 0xff ******************************************************/
1066 :
1067 42 : FD_VM_INTERP_INSTR_BEGIN(0xf6) /* FD_SBPF_OP_SREM64_IMM */
1068 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1069 39 : reg[ dst ] = (ulong)( (long)reg_dst % (long)(int)imm );
1070 39 : FD_VM_INTERP_INSTR_END;
1071 :
1072 21 : FD_VM_INTERP_INSTR_BEGIN(0xf7) /* FD_SBPF_OP_HOR64 */
1073 21 : reg[ dst ] = reg_dst | (((ulong)imm) << 32);
1074 21 : FD_VM_INTERP_INSTR_END;
1075 :
1076 48 : FD_VM_INTERP_INSTR_BEGIN(0xfe) /* FD_SBPF_OP_SREM64_REG */
1077 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1078 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1079 36 : reg[ dst ] = (ulong)( (long)reg_dst % (long)reg_src );
1080 36 : FD_VM_INTERP_INSTR_END;
1081 :
1082 : /* FIXME: sigbus/sigrdonly are mapped to sigsegv for simplicity
1083 : currently but could be enabled if desired. */
1084 :
1085 : /* Note: sigtextbr is for sigtext errors that occur on branching
1086 : instructions (i.e., prefixed with FD_VM_INTERP_BRANCH_BEGIN).
1087 : We skip a repeat ic accumulation in FD_VM_INTERP_FAULT */
1088 :
1089 : /* FD_VM_INTERP_FAULT accumulates to ic and cu all non-faulting
1090 : instructions preceeding a fault generated by a non-branching
1091 : instruction. When a non-branching instruction faults, pc is at the
1092 : instruction and the number of non-branching instructions that have
1093 : not yet been reflected in ic and cu is:
1094 :
1095 : pc - pc0 + 1 - ic_correction
1096 :
1097 : as per the accounting described above. +1 to include the faulting
1098 : instruction itself.
1099 :
1100 : Note that, for a sigtext caused by a branch instruction, pc0==pc
1101 : (from the BRANCH_END) and ic_correction==0 (from the BRANCH_BEGIN)
1102 : such that the below does not change the already current values in
1103 : ic and cu. Thus it also "does the right thing" in both the
1104 : non-branching and branching cases for sigtext. The same applies to
1105 : sigsplit. */
1106 :
1107 0 : #define FD_VM_INTERP_FAULT \
1108 1626 : ic_correction = pc - pc0 + 1UL - ic_correction; \
1109 1626 : ic += ic_correction; \
1110 1626 : if ( FD_UNLIKELY( ic_correction > cu ) ) err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; \
1111 1626 : cu -= fd_ulong_min( ic_correction, cu )
1112 :
1113 78 : sigtext: err = FD_VM_ERR_EBPF_EXECUTION_OVERRUN; FD_VM_INTERP_FAULT; goto interp_halt;
1114 42 : sigtextbr: err = FD_VM_ERR_EBPF_CALL_OUTSIDE_TEXT_SEGMENT; /* ic current */ /* cu current */ goto interp_halt;
1115 0 : sigstack: err = FD_VM_ERR_EBPF_CALL_DEPTH_EXCEEDED; /* ic current */ /* cu current */ goto interp_halt;
1116 1176 : sigill: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; FD_VM_INTERP_FAULT; goto interp_halt;
1117 6 : sigillbr: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1118 18 : siginv: err = FD_VM_ERR_EBPF_INVALID_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1119 198 : sigsegv: err = fd_vm_generate_access_violation( vm->segv_vaddr, vm->sbpf_version ); FD_VM_INTERP_FAULT; goto interp_halt;
1120 681 : sigcost: err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; /* ic current */ cu = 0UL; goto interp_halt;
1121 0 : sigsyscall: err = FD_VM_ERR_EBPF_SYSCALL_ERROR; /* ic current */ /* cu current */ goto interp_halt;
1122 138 : sigfpe: err = FD_VM_ERR_EBPF_DIVIDE_BY_ZERO; FD_VM_INTERP_FAULT; goto interp_halt;
1123 36 : sigfpeof: err = FD_VM_ERR_EBPF_DIVIDE_OVERFLOW; FD_VM_INTERP_FAULT; goto interp_halt;
1124 5406 : sigexit: /* err current */ /* ic current */ /* cu current */ goto interp_halt;
1125 :
1126 0 : #undef FD_VM_INTERP_FAULT
1127 :
1128 7779 : interp_halt:
1129 :
1130 : /* Pack the unpacked execution state into vm to give a precise view of
1131 : the execution when the vm halted. */
1132 :
1133 7779 : vm->pc = pc;
1134 7779 : vm->ic = ic;
1135 7779 : vm->cu = cu;
1136 7779 : vm->frame_cnt = frame_cnt;
1137 :
1138 7779 : # undef FD_VM_INTERP_STACK_PUSH
1139 :
1140 7779 : # undef FD_VM_INTERP_BRANCH_END
1141 7779 : # undef FD_VM_INTERP_BRANCH_BEGIN
1142 :
1143 7779 : # undef FD_VM_INTERP_INSTR_END
1144 7779 : # undef FD_VM_INTERP_INSTR_BEGIN
1145 7779 : # undef FD_VM_INTERP_INSTR_EXEC
1146 :
1147 7779 : # if defined(__clang__)
1148 7779 : # pragma clang diagnostic pop
1149 7779 : # endif
1150 :
1151 7779 : # if defined(__GNUC__)
1152 7779 : # pragma GCC diagnostic pop
1153 7779 : # endif
1154 :
1155 : /* Agave/JIT CU model analysis (and why we are conformant!):
1156 :
1157 : The Agave JIT employs a similar strategy of accumulating instructions
1158 : in a linear run and processing them at the start of a new linear
1159 : run/branch (side note: the JIT treats the LDQ instruction as a "branch"
1160 : that jumps pc + 2).
1161 :
1162 : In what is assumed to be an act of register conservation, the JIT
1163 : uses a catch-all "instruction meter" (IM) register (REGISTER_INSTRUCTION_METER)
1164 : that represents two different interpretations of the question
1165 : "how many instructions can I execute?".
1166 :
1167 : The IM, depending on where we are in the execution, either represents:
1168 : 1. IM => The number of instructions remaining before exhausting CU
1169 : budget. This is analagous to vm->cu in our interpreter.
1170 : 2. IM' => The last pc you can execute in the current linear run before
1171 : exhausting CU budget. Mathematically, IM' = IM + pc0
1172 : where pc0, just like our definition, is the start of the linear run.
1173 :
1174 : Note: IM' can go past the actual basic block/segment. In-fact,
1175 : it typically does, and implies we can execute the full block without
1176 : exhausting CU budget (reminder that LDQ is treated as a branch).
1177 :
1178 : By default, the IM' form is used during execution. The IM form is used:
1179 : - (transiently) during the processing of a branch instruction
1180 : - in post-VM cleanup (updates EbpfVm::previous_instruction_meter).
1181 :
1182 : When a branch instruction is encountered, the JIT checks
1183 : for CU exhaustion with pc > IM', and throws an exception if so. This is valid,
1184 : because as described above, IM' is the largest PC you can reach.
1185 :
1186 : If we haven't exhausted our CU limit, it updates IM':
1187 : 1. IM = IM' - (pc + 1) # Note that IM' at this point is IM + pc0',
1188 : # where pc0' is the start of the current linear run.
1189 : 2. IM' = IM + pc0 # pc0 is the start of the new linear run (typically the target pc)
1190 :
1191 : Code (that does the above in one ALU instruction):
1192 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L891
1193 :
1194 :
1195 : ### How does this relate to our interpreter?
1196 :
1197 : This process is similar to FD_VM_INTERP_BRANCH_BEGIN.
1198 : We just deal with the IM form throughout (with vm->cu and ic_correction).
1199 : If we break down step 1 from above with what we know about IM and IM',
1200 : we get the following:
1201 : 1. IM = IM' - (pc + 1)
1202 : IM = (IM + pc0') - (pc + 1)
1203 : IM = IM + (pc0' - (pc + 1))
1204 : IM = IM - ((pc + 1) - pc0')
1205 : IM = IM - ic_correction
1206 : Here, ((pc + 1) - pc0') is the number of instrutions executed in the current
1207 : linear run. This is the same as our ic_correction(*) in FD_VM_INTERP_BRANCH_BEGIN.
1208 :
1209 : If we replace IM with cu, this effectively becomes the
1210 : cu -= ic_correction
1211 : line in FD_VM_INTERP_BRANCH_BEGIN.
1212 :
1213 : (*) Note: ic_correction (also) takes two forms. It is either the instruction
1214 : accumulator or the number of instructions executed in the current linear run.
1215 : It (transiently) takes the latter form during FD_VM_INTERP_BRANCH_BEGIN and
1216 : FD_VM_INTERP_FAULT, and the former form otherwise.
1217 : */
1218 :
1219 : /* (WIP) Precise faulting and the Agave JIT:
1220 :
1221 : Since the cost model is a part of consensus, we need to conform with the Agave/JIT
1222 : cost model 1:1. To achieve that, our faulting model also needs to match precisely. This
1223 : section covers the various faults that the respective VMs implement and how they match.
1224 :
1225 : # Normal VM exit (sigexit):
1226 : VM exit instruction entrypoint: https://github.com/solana-labs/rbpf/blob/12237895305ab38514be865ebed6268553e4f589/src/jit.rs#L698-L708
1227 :
1228 : Pseudocode (with FD semantics):
1229 : ```
1230 : # pc is at the exit instruction
1231 : # pc0 is the start of the current linear run
1232 : if (frame_cnt == 0) {
1233 : goto sigexit;
1234 : }
1235 : ...
1236 :
1237 : sigexit:
1238 : if IM' <= pc {
1239 : goto sigcost;
1240 : } else {
1241 : goto interp_halt;
1242 : }
1243 : ```
1244 :
1245 : Breaking down the IM' < pc check:
1246 : - IM' = IM + pc0
1247 : - pc = ic + pc0, where (ic + 1) is the number of instructions executed in the current linear run
1248 :
1249 : IM' <= pc
1250 : IM + pc0 <= ic + pc0
1251 : IM <= ic
1252 : IM <= pc - pc0
1253 : IM < pc - pc0 + 1 # all unsigned integers
1254 : IM < ic_correction
1255 :
1256 : This is analagous to the ic_correction>cu check in VM_INTERP_BRANCH_BEGIN.
1257 :
1258 : # (TODO) Text Overrun (sigtext/sigsplit):
1259 :
1260 : */
|
