Line data Source code
1 : /* This is the VM SBPF interpreter core. The caller unpacks the VM
2 : state and then just lets execution continue into this (or jumps to
3 : interp_exec) to start running. The VM will run until it halts or
4 : faults. On normal termination, it will branch to interp_halt to
5 : exit. Each fault has its own exit label to allow the caller to
6 : handle individually. */
7 :
8 : /* FIXME: SIGILLS FOR VARIOUS THINGS THAT HAVE UNNECESSARY BITS IN IMM
9 : SET? (LIKE WIDE SHIFTS?) */
10 :
11 0 : # if defined(__GNUC__) /* -Wpedantic rejects labels as values and rejects goto *expr */
12 0 : # pragma GCC diagnostic push
13 0 : # pragma GCC diagnostic ignored "-Wpedantic"
14 0 : # endif
15 :
16 0 : # if defined(__clang__) /* Clang is differently picky about labels as values and goto *expr */
17 0 : # pragma clang diagnostic push
18 0 : # pragma clang diagnostic ignored "-Wpedantic"
19 0 : # pragma clang diagnostic ignored "-Wgnu-label-as-value"
20 0 : # endif
21 :
22 : /* Include the jump table */
23 :
24 11331 : # include "fd_vm_interp_jump_table.c"
25 :
26 : /* Update the jump table based on SBPF version */
27 :
28 0 : ulong sbpf_version = vm->sbpf_version;
29 :
30 : /* Unpack the VM state */
31 :
32 0 : ulong pc = vm->pc;
33 0 : ulong ic = vm->ic;
34 0 : ulong cu = vm->cu;
35 0 : ulong frame_cnt = vm->frame_cnt;
36 :
37 0 : void const * const * const version_interp_jump_table = interp_jump_table[ sbpf_version ];
38 :
39 : /* FD_VM_INTERP_INSTR_EXEC loads the first word of the instruction at
40 : pc, parses it, fetches the associated register values and then
41 : jumps to the code that executes the instruction. On normal
42 : instruction execution, the pc will be updated and
43 : FD_VM_INTERP_INSTR_EXEC will be invoked again to do the next
44 : instruction. After a normal halt, this will branch to interp_halt.
45 : Otherwise, it will branch to the appropriate normal termination. */
46 :
47 0 : ulong instr;
48 0 : ulong opcode;
49 0 : ulong dst;
50 0 : ulong src;
51 0 : ulong offset; /* offset is 16-bit but always sign extended, so we handle cast once */
52 0 : uint imm;
53 0 : ulong reg_dst;
54 0 : ulong reg_src;
55 :
56 : /* These mimic the exact Rust semantics for wrapping_shl and wrapping_shr. */
57 :
58 : /* u64::wrapping_shl: a.unchecked_shl(b & (64 - 1))
59 :
60 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shl
61 : */
62 10995 : #define FD_RUST_ULONG_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 63 ) ))
63 :
64 : /* u64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
65 :
66 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shr
67 : */
68 126 : #define FD_RUST_ULONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
69 :
70 : /* u32::wrapping_shl: a.unchecked_shl(b & (32 - 1))
71 :
72 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shl
73 : */
74 900 : #define FD_RUST_UINT_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 31 ) ))
75 :
76 : /* u32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
77 :
78 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shr
79 : */
80 18 : #define FD_RUST_UINT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
81 :
82 : /* i32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
83 :
84 : https://doc.rust-lang.org/std/primitive.i32.html#method.wrapping_shr
85 : */
86 243 : #define FD_RUST_INT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
87 :
88 : /* i64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
89 :
90 : https://doc.rust-lang.org/std/primitive.i64.html#method.wrapping_shr
91 : */
92 423 : #define FD_RUST_LONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
93 :
94 :
95 0 : # define FD_VM_INTERP_INSTR_EXEC \
96 663939 : if( FD_UNLIKELY( pc>=block_text_limit ) ) goto sigtext_or_sigcost; /* Note: untaken branches don't consume BTB */ \
97 663939 : instr = text[ pc ]; /* Guaranteed in-bounds */ \
98 663795 : opcode = fd_vm_instr_opcode( instr ); /* in [0,256) even if malformed */ \
99 663795 : dst = fd_vm_instr_dst ( instr ); /* in [0, 16) even if malformed */ \
100 663795 : src = fd_vm_instr_src ( instr ); /* in [0, 16) even if malformed */ \
101 663795 : offset = fd_vm_instr_offset( instr ); /* in [-2^15,2^15) even if malformed */ \
102 663795 : imm = fd_vm_instr_imm ( instr ); /* in [0,2^32) even if malformed */ \
103 663795 : reg_dst = reg[ dst ]; /* Guaranteed in-bounds */ \
104 663795 : reg_src = reg[ src ]; /* Guaranteed in-bounds */ \
105 663795 : goto *version_interp_jump_table[ opcode ] /* Guaranteed in-bounds */
106 :
107 : /* FD_VM_INTERP_SYSCALL_EXEC
108 : (macro to handle the logic of 0x85 pre- and post- SIMD-0178: static syscalls)
109 :
110 : Setup.
111 : Update the vm with the current vm execution state for the
112 : syscall. Note that BRANCH_BEGIN has pc at the syscall and
113 : already updated ic and cu to reflect all instructions up to
114 : and including the syscall instruction itself.
115 :
116 : Execution.
117 : Do the syscall. We use ret reduce the risk of the syscall
118 : accidentally modifying other registers (note however since a
119 : syscall has the vm handle it still do arbitrary modifications
120 : to the vm state) and the risk of a pointer escape on reg from
121 : inhibiting compiler optimizations (this risk is likely low in
122 : as this is the only point in the whole interpreter core that
123 : calls outside this translation unit).
124 : At this point, vm->cu is positive.
125 :
126 : Error handling.
127 : If we trust syscall implementations to handle the vm state
128 : correctly, the below could be implemented as unpacking the vm
129 : state and jumping to sigsys on error. But we provide some
130 : extra protection to make various strong guarantees:
131 :
132 : - We do not let the syscall modify pc currently as nothing
133 : requires this and it reduces risk of a syscall bug mucking
134 : up the interpreter. If there ever was a syscall that
135 : needed to modify the pc (e.g. a syscall that has execution
136 : resume from a different location than the instruction
137 : following the syscall), do "pc = vm->pc" below.
138 :
139 : - We do not let the syscall modify ic currently as nothing
140 : requires this and it keeps the ic precise. If a future
141 : syscall needs this, do "ic = vm->ic" below.
142 :
143 : - We do not let the syscall increase cu as nothing requires
144 : this and it guarantees the interpreter will halt in a
145 : reasonable finite amount of time. If a future syscall
146 : needs this, do "cu = vm->cu" below.
147 :
148 : - A syscall that returns SIGCOST is always treated as though
149 : it also zerod cu.
150 :
151 : At this point, vm->cu is whatever the syscall tried to set
152 : and cu is positive.
153 :
154 : Exit
155 : At this point, cu is positive and err is clear.
156 : */
157 :
158 0 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP \
159 : /* Dumping for debugging purposes */ \
160 42 : if( FD_UNLIKELY( vm->dump_syscall_to_pb ) ) { \
161 0 : fd_dump_vm_syscall_to_protobuf( vm, syscall->name ); \
162 0 : }
163 :
164 0 : # define FD_VM_INTERP_SYSCALL_EXEC \
165 : /* Setup */ \
166 42 : vm->pc = pc; \
167 42 : vm->ic = ic; \
168 42 : vm->cu = cu; \
169 42 : vm->frame_cnt = frame_cnt; \
170 42 : FD_VM_INTERP_SYSCALL_EXEC_DUMP \
171 : /* Execution */ \
172 42 : ulong ret[1]; \
173 42 : err = syscall->func( vm, reg[1], reg[2], reg[3], reg[4], reg[5], ret ); \
174 42 : reg[0] = ret[0]; \
175 : /* Error handling */ \
176 42 : ulong cu_req = vm->cu; \
177 42 : cu = fd_ulong_min( cu_req, cu ); \
178 42 : if( FD_UNLIKELY( err ) ) { \
179 0 : if( err==FD_VM_SYSCALL_ERR_COMPUTE_BUDGET_EXCEEDED ) cu = 0UL; /* cmov */ \
180 0 : FD_VM_TEST_ERR_EXISTS( vm ); \
181 0 : goto sigsyscall; \
182 0 : } \
183 : /* Exit */
184 :
185 :
186 : /* FD_VM_INTERP_INSTR_BEGIN / FD_VM_INTERP_INSTR_END bracket opcode's
187 : implementation for an opcode that does not branch. On entry, the
188 : instruction word has been unpacked into dst / src / offset / imm
189 : and reg[dst] / reg[src] has been prefetched into reg_dst / reg_src. */
190 :
191 480849 : # define FD_VM_INTERP_INSTR_BEGIN(opcode) interp_##opcode:
192 :
193 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~0.3% faster in some benchmarks, slower in others but more code footprint */
194 480453 : # define FD_VM_INTERP_INSTR_END pc++; FD_VM_INTERP_INSTR_EXEC
195 : # else /* Use this version when tracing or optimizing code footprint */
196 0 : # define FD_VM_INTERP_INSTR_END pc++; goto interp_exec
197 : # endif
198 :
199 : /* Instead of doing a lot of compute budget calcs and tests every
200 : instruction, we note that the program counter increases
201 : monotonically after a branch (or a program start) until the next
202 : branch (or program termination). We save the program counter of
203 : the start of such a segment in pc0. Whenever we encounter a branch
204 : (or a program termination) at pc, we know we processed pc-pc0+1
205 : text words (including the text word for the branch instruction
206 : itself as all branch instructions are single word).
207 :
208 : Each instruction costs 1 cu (syscalls can cost extra on top of
209 : this that is accounted separately in CALL_IMM below). Since there
210 : could have been multiword instructions in this segment, at start of
211 : such a segment, we zero out the accumulator ic_correction and have
212 : every multiword instruction in the segment accumulate the number of
213 : extra text words it has to this variable. (Sigh ... it would be a
214 : lot simpler to bill based on text words processed but this would be
215 : very difficult to make this protocol change at this point.)
216 :
217 : When we encounter a branch at pc, the number of instructions
218 : processed (and thus the number of compute units to bill for that
219 : segment) is thus:
220 :
221 : pc - pc0 + 1 - ic_correction */
222 :
223 0 : ulong pc0 = pc;
224 0 : ulong ic_correction = 0UL;
225 :
226 : /* Compute the text limit for a basic block. This bounds the number
227 : of instructions that the basic block can execute linearly.
228 :
229 : There are two factors: the remaining CU budget as of the start of
230 : the basic block, and the text_cnt. The tightest bound is the
231 : lesser of the two.
232 :
233 : We use 2*(the remaining CU budget) because each LDDW instruction
234 : costs 1 CU, but occupies two text words, so in the worst case (a
235 : block full of LDDW instructions) the block text limit should be
236 : doubled.
237 :
238 : It is safe to not use saturating addition here. Both addends are
239 : bounded far below ULONG_MAX before any block executes:
240 :
241 : pc0 <= text_cnt <= 1310720 (see fd_sbpf_loader.h)
242 : cu <= 1400000 (FD_MAX_COMPUTE_UNIT_LIMIT)
243 :
244 : pc0 + cu + cu + 1 < 1310720 + 1400000 + 1400000 + 1 < ULONG_MAX */
245 :
246 183456 : # define FD_VM_INTERP_BLOCK_TEXT_LIMIT fd_ulong_min( text_cnt, pc0+cu+cu+1UL )
247 :
248 11331 : ulong block_text_limit = FD_VM_INTERP_BLOCK_TEXT_LIMIT;
249 :
250 0 : # define FD_VM_INTERP_BRANCH_BEGIN(opcode) \
251 181767 : interp_##opcode: \
252 : /* Bill linear text segment and this branch instruction as per the above */ \
253 181767 : ic_correction = pc - pc0 + 1UL - ic_correction; \
254 181767 : ic += ic_correction; \
255 181767 : if( FD_UNLIKELY( ic_correction>cu ) ) goto sigcost; /* Note: untaken branches don't consume BTB */ \
256 181767 : cu -= ic_correction; \
257 : /* At this point, cu>=0 */ \
258 180960 : ic_correction = 0UL;
259 :
260 : /* FIXME: debatable if it is better to do pc++ here or have the
261 : instruction implementations do it in their code path. */
262 :
263 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~4% faster in some benchmarks, slower in others but more code footprint */
264 : # define FD_VM_INTERP_BRANCH_END \
265 172125 : pc++; \
266 172125 : pc0 = pc; /* Start a new linear segment */ \
267 172125 : block_text_limit = FD_VM_INTERP_BLOCK_TEXT_LIMIT; \
268 172155 : FD_VM_INTERP_INSTR_EXEC
269 : # else /* Use this version when tracing or optimizing code footprint */
270 : # define FD_VM_INTERP_BRANCH_END \
271 0 : pc++; \
272 0 : pc0 = pc; /* Start a new linear segment */ \
273 0 : block_text_limit = FD_VM_INTERP_BLOCK_TEXT_LIMIT; \
274 : /* FIXME: TEST sigsplit HERE */ \
275 0 : goto interp_exec
276 : # endif
277 :
278 : /* FD_VM_INTERP_STACK_PUSH pushes reg[6:9] onto the shadow stack and
279 : advances reg[10] to a new user stack frame. If there are no more
280 : stack frames available, will do a SIGSTACK. */
281 :
282 : /* FIXME: double check faulting is desired on stack overflow. */
283 :
284 : /* FIXME: a pre-belt-sanding FIXME implied the TLB should be updated
285 : to prevent byte code from accessing the stack outside its current
286 : stack frame. But this would break the common practice of a
287 : function passing a pointer to something on its stack into a
288 : function that it calls:
289 :
290 : void foo( ... ) {
291 : ...
292 : int ret;
293 : bar( &ret );
294 : ...
295 : }
296 :
297 : So this probably shouldn't be done. But, if it is in fact
298 : necessary, the TLB updates would be here and in pop. */
299 :
300 : /* FIXME: unvalidated code mucking with r10 */
301 :
302 0 : # define FD_VM_INTERP_STACK_PUSH \
303 645 : shadow[ frame_cnt ].r6 = reg[6]; \
304 645 : shadow[ frame_cnt ].r7 = reg[7]; \
305 645 : shadow[ frame_cnt ].r8 = reg[8]; \
306 645 : shadow[ frame_cnt ].r9 = reg[9]; \
307 645 : shadow[ frame_cnt ].r10 = reg[10]; \
308 645 : shadow[ frame_cnt ].pc = pc; \
309 645 : if( FD_UNLIKELY( ++frame_cnt>=frame_max ) ) goto sigstack; /* Note: untaken branches don't consume BTB */ \
310 645 : reg[10] += vm->stack_frame_sz * vm->stack_push_frame_count; \
311 : /* We subtract the heap cost in the BPF loader */
312 :
313 0 : goto interp_exec; /* Silly but to avoid unused label warning in some configurations */
314 11331 : interp_exec:
315 :
316 : # ifdef FD_VM_INTERP_EXE_TRACING_ENABLED
317 : /* Note: when tracing or optimizing for code footprint, all
318 : instruction execution starts here such that this is only point
319 : where exe tracing diagnostics are needed. */
320 0 : if( FD_UNLIKELY( pc>=block_text_limit ) ) goto sigtext_or_sigcost;
321 0 : fd_vm_trace_event_exe( vm->trace, pc, ic + ( pc - pc0 - ic_correction ), cu, reg, vm->text + pc, vm->text_cnt - pc, ic_correction, frame_cnt );
322 0 : # endif
323 :
324 11331 : FD_VM_INTERP_INSTR_EXEC;
325 :
326 : /* 0x00 - 0x0f ******************************************************/
327 :
328 11331 : FD_VM_INTERP_INSTR_BEGIN(0x04) /* FD_SBPF_OP_ADD_IMM */
329 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)imm );
330 36 : FD_VM_INTERP_INSTR_END;
331 :
332 45 : FD_VM_INTERP_INSTR_BEGIN(0x04depr) /* FD_SBPF_OP_ADD_IMM deprecated SIMD-0174 */
333 45 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)imm );
334 45 : FD_VM_INTERP_INSTR_END;
335 :
336 11847 : FD_VM_INTERP_BRANCH_BEGIN(0x05) /* FD_SBPF_OP_JA */
337 11841 : pc += offset;
338 11841 : FD_VM_INTERP_BRANCH_END;
339 :
340 55038 : FD_VM_INTERP_INSTR_BEGIN(0x07) /* FD_SBPF_OP_ADD64_IMM */
341 55038 : reg[ dst ] = reg_dst + (ulong)(long)(int)imm;
342 55038 : FD_VM_INTERP_INSTR_END;
343 :
344 33 : FD_VM_INTERP_INSTR_BEGIN(0x0c) /* FD_SBPF_OP_ADD_REG */
345 33 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)reg_src );
346 33 : FD_VM_INTERP_INSTR_END;
347 :
348 39 : FD_VM_INTERP_INSTR_BEGIN(0x0cdepr) /* FD_SBPF_OP_ADD_REG deprecated SIMD-0174 */
349 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)reg_src );
350 39 : FD_VM_INTERP_INSTR_END;
351 :
352 14268 : FD_VM_INTERP_INSTR_BEGIN(0x0f) /* FD_SBPF_OP_ADD64_REG */
353 14268 : reg[ dst ] = reg_dst + reg_src;
354 14268 : FD_VM_INTERP_INSTR_END;
355 :
356 : /* 0x10 - 0x1f ******************************************************/
357 :
358 36 : FD_VM_INTERP_INSTR_BEGIN(0x14) /* FD_SBPF_OP_SUB_IMM */
359 36 : reg[ dst ] = (ulong)(uint)( (int)imm - (int)reg_dst );
360 36 : FD_VM_INTERP_INSTR_END;
361 :
362 39 : FD_VM_INTERP_INSTR_BEGIN(0x14depr) /* FD_SBPF_OP_SUB_IMM deprecated SIMD-0174 */
363 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)imm );
364 39 : FD_VM_INTERP_INSTR_END;
365 :
366 13194 : FD_VM_INTERP_BRANCH_BEGIN(0x15) /* FD_SBPF_OP_JEQ_IMM */
367 13182 : pc += fd_ulong_if( reg_dst==(ulong)(long)(int)imm, offset, 0UL );
368 13182 : FD_VM_INTERP_BRANCH_END;
369 :
370 33 : FD_VM_INTERP_INSTR_BEGIN(0x17) /* FD_SBPF_OP_SUB64_IMM */
371 33 : reg[ dst ] = (ulong)(long)(int)imm - reg_dst;
372 33 : FD_VM_INTERP_INSTR_END;
373 :
374 36 : FD_VM_INTERP_INSTR_BEGIN(0x17depr) /* FD_SBPF_OP_SUB64_IMM deprecated SIMD-0174 */
375 36 : reg[ dst ] = reg_dst - (ulong)(long)(int)imm;
376 36 : FD_VM_INTERP_INSTR_END;
377 :
378 24459 : FD_VM_INTERP_INSTR_BEGIN(0x18) /* FD_SBPF_OP_LDQ */
379 24459 : pc++;
380 24459 : ic_correction++;
381 : /* No need to check pc because it's already checked during validation.
382 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigsplit; // Note: untaken branches don't consume BTB */
383 24459 : reg[ dst ] = (ulong)((ulong)imm | ((ulong)fd_vm_instr_imm( text[ pc ] ) << 32));
384 24459 : FD_VM_INTERP_INSTR_END;
385 :
386 36 : FD_VM_INTERP_INSTR_BEGIN(0x1c) /* FD_SBPF_OP_SUB_REG */
387 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst - (int)reg_src );
388 36 : FD_VM_INTERP_INSTR_END;
389 :
390 39 : FD_VM_INTERP_INSTR_BEGIN(0x1cdepr) /* FD_SBPF_OP_SUB_REG deprecated SIMD-0174 */
391 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)reg_src );
392 39 : FD_VM_INTERP_INSTR_END;
393 :
394 1998 : FD_VM_INTERP_BRANCH_BEGIN(0x1d) /* FD_SBPF_OP_JEQ_REG */
395 1992 : pc += fd_ulong_if( reg_dst==reg_src, offset, 0UL );
396 1992 : FD_VM_INTERP_BRANCH_END;
397 :
398 41193 : FD_VM_INTERP_INSTR_BEGIN(0x1f) /* FD_SBPF_OP_SUB64_REG */
399 41193 : reg[ dst ] = reg_dst - reg_src;
400 41193 : FD_VM_INTERP_INSTR_END;
401 :
402 : /* 0x20 - 0x2f ******************************************************/
403 :
404 42 : FD_VM_INTERP_INSTR_BEGIN(0x24) /* FD_SBPF_OP_MUL_IMM */
405 42 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)imm );
406 42 : FD_VM_INTERP_INSTR_END;
407 :
408 3876 : FD_VM_INTERP_BRANCH_BEGIN(0x25) /* FD_SBPF_OP_JGT_IMM */
409 3846 : pc += fd_ulong_if( reg_dst>(ulong)(long)(int)imm, offset, 0UL );
410 3846 : FD_VM_INTERP_BRANCH_END;
411 :
412 9 : FD_VM_INTERP_INSTR_BEGIN(0x27) { /* FD_SBPF_OP_STB */
413 9 : ulong vaddr = reg_dst + offset;
414 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
415 9 : if( FD_UNLIKELY( !haddr ) ) {
416 6 : vm->segv_vaddr = vaddr;
417 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
418 6 : vm->segv_access_len = 1UL;
419 6 : goto sigsegv;
420 6 : } /* Note: untaken branches don't consume BTB */
421 3 : fd_vm_mem_st_1( haddr, (uchar)imm );
422 3 : }
423 3 : FD_VM_INTERP_INSTR_END;
424 :
425 13158 : FD_VM_INTERP_INSTR_BEGIN(0x2c) { /* FD_SBPF_OP_LDXB */
426 13158 : ulong vaddr = reg_src + offset;
427 13158 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_ld_sz, 0, 0UL );
428 13158 : if( FD_UNLIKELY( !haddr ) ) {
429 24 : vm->segv_vaddr = vaddr;
430 24 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
431 24 : vm->segv_access_len = 1UL;
432 24 : goto sigsegv;
433 24 : } /* Note: untaken branches don't consume BTB */
434 13134 : reg[ dst ] = fd_vm_mem_ld_1( haddr );
435 13134 : }
436 13134 : FD_VM_INTERP_INSTR_END;
437 :
438 4587 : FD_VM_INTERP_BRANCH_BEGIN(0x2d) /* FD_SBPF_OP_JGT_REG */
439 4557 : pc += fd_ulong_if( reg_dst>reg_src, offset, 0UL );
440 4557 : FD_VM_INTERP_BRANCH_END;
441 :
442 14409 : FD_VM_INTERP_INSTR_BEGIN(0x2f) { /* FD_SBPF_OP_STXB */
443 14409 : ulong vaddr = reg_dst + offset;
444 14409 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
445 14409 : if( FD_UNLIKELY( !haddr ) ) {
446 30 : vm->segv_vaddr = vaddr;
447 30 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
448 30 : vm->segv_access_len = 1UL;
449 30 : goto sigsegv;
450 30 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigrdonly */
451 14379 : fd_vm_mem_st_1( haddr, (uchar)reg_src );
452 14379 : }
453 14379 : FD_VM_INTERP_INSTR_END;
454 :
455 11022 : FD_VM_INTERP_INSTR_BEGIN(0x27depr) /* FD_SBPF_OP_MUL64_IMM */
456 11022 : reg[ dst ] = (ulong)( (long)reg_dst * (long)(int)imm );
457 11022 : FD_VM_INTERP_INSTR_END;
458 :
459 39 : FD_VM_INTERP_INSTR_BEGIN(0x2cdepr) /* FD_SBPF_OP_MUL_REG */
460 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)reg_src );
461 39 : FD_VM_INTERP_INSTR_END;
462 :
463 30093 : FD_VM_INTERP_INSTR_BEGIN(0x2fdepr) /* FD_SBPF_OP_MUL64_REG */
464 30093 : reg[ dst ] = reg_dst * reg_src;
465 30093 : FD_VM_INTERP_INSTR_END;
466 :
467 : /* 0x30 - 0x3f ******************************************************/
468 :
469 42 : FD_VM_INTERP_INSTR_BEGIN(0x34) /* FD_SBPF_OP_DIV_IMM */
470 42 : /* FIXME: convert to a multiply at validation time (usually probably
471 42 : not worth it) */
472 42 : reg[ dst ] = (ulong)((uint)reg_dst / imm);
473 42 : FD_VM_INTERP_INSTR_END;
474 :
475 6123 : FD_VM_INTERP_BRANCH_BEGIN(0x35) /* FD_SBPF_OP_JGE_IMM */
476 6063 : pc += fd_ulong_if( reg_dst>=(ulong)(long)(int)imm, offset, 0UL );
477 6063 : FD_VM_INTERP_BRANCH_END;
478 :
479 3 : FD_VM_INTERP_INSTR_BEGIN(0x36) /* FD_SBPF_OP_UHMUL64_IMM */
480 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)(ulong)imm ) >> 64 );
481 3 : FD_VM_INTERP_INSTR_END;
482 :
483 9 : FD_VM_INTERP_INSTR_BEGIN(0x37) { /* FD_SBPF_OP_STH */
484 9 : ulong vaddr = reg_dst + offset;
485 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
486 9 : int sigsegv = !haddr;
487 9 : if( FD_UNLIKELY( sigsegv ) ) {
488 6 : vm->segv_vaddr = vaddr;
489 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
490 6 : vm->segv_access_len = 2UL;
491 6 : goto sigsegv;
492 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
493 3 : fd_vm_mem_st_2( haddr, (ushort)imm );
494 3 : }
495 3 : FD_VM_INTERP_INSTR_END;
496 :
497 96 : FD_VM_INTERP_INSTR_BEGIN(0x3c) { /* FD_SBPF_OP_LDXH */
498 96 : ulong vaddr = reg_src + offset;
499 96 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_ld_sz, 0, 0UL );
500 96 : int sigsegv = !haddr;
501 96 : if( FD_UNLIKELY( sigsegv ) ) {
502 36 : vm->segv_vaddr = vaddr;
503 36 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
504 36 : vm->segv_access_len = 2UL;
505 36 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
506 36 : }
507 60 : reg[ dst ] = fd_vm_mem_ld_2( haddr );
508 60 : }
509 60 : FD_VM_INTERP_INSTR_END;
510 :
511 36747 : FD_VM_INTERP_BRANCH_BEGIN(0x3d) /* FD_SBPF_OP_JGE_REG */
512 36693 : pc += fd_ulong_if( reg_dst>=reg_src, offset, 0UL );
513 36693 : FD_VM_INTERP_BRANCH_END;
514 :
515 9 : FD_VM_INTERP_INSTR_BEGIN(0x3f) { /* FD_SBPF_OP_STXH */
516 9 : ulong vaddr = reg_dst + offset;
517 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
518 9 : int sigsegv = !haddr;
519 9 : if( FD_UNLIKELY( sigsegv ) ) {
520 6 : vm->segv_vaddr = vaddr;
521 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
522 6 : vm->segv_access_len = 2UL;
523 6 : goto sigsegv;
524 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
525 3 : fd_vm_mem_st_2( haddr, (ushort)reg_src );
526 3 : }
527 3 : FD_VM_INTERP_INSTR_END;
528 :
529 3 : FD_VM_INTERP_INSTR_BEGIN(0x3e) /* FD_SBPF_OP_UHMUL64_REG */
530 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)reg_src ) >> 64 );
531 3 : FD_VM_INTERP_INSTR_END;
532 :
533 10965 : FD_VM_INTERP_INSTR_BEGIN(0x37depr) /* FD_SBPF_OP_DIV64_IMM */
534 10965 : reg[ dst ] = reg_dst / (ulong)(long)(int)imm;
535 10965 : FD_VM_INTERP_INSTR_END;
536 :
537 57 : FD_VM_INTERP_INSTR_BEGIN(0x3cdepr) /* FD_SBPF_OP_DIV_REG */
538 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
539 42 : reg[ dst ] = (ulong)((uint)reg_dst / (uint)reg_src);
540 42 : FD_VM_INTERP_INSTR_END;
541 :
542 30072 : FD_VM_INTERP_INSTR_BEGIN(0x3fdepr) /* FD_SBPF_OP_DIV64_REG */
543 30072 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
544 30060 : reg[ dst ] = reg_dst / reg_src;
545 30060 : FD_VM_INTERP_INSTR_END;
546 :
547 : /* 0x40 - 0x4f ******************************************************/
548 :
549 51 : FD_VM_INTERP_INSTR_BEGIN(0x44) /* FD_SBPF_OP_OR_IMM */
550 51 : reg[ dst ] = (ulong)( (uint)reg_dst | imm );
551 51 : FD_VM_INTERP_INSTR_END;
552 :
553 1266 : FD_VM_INTERP_BRANCH_BEGIN(0x45) /* FD_SBPF_OP_JSET_IMM */
554 1254 : pc += fd_ulong_if( !!(reg_dst & (ulong)(long)(int)imm), offset, 0UL );
555 1254 : FD_VM_INTERP_BRANCH_END;
556 :
557 39 : FD_VM_INTERP_INSTR_BEGIN(0x46) /* FD_SBPF_OP_UDIV32_IMM */
558 39 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)imm );
559 39 : FD_VM_INTERP_INSTR_END;
560 :
561 51 : FD_VM_INTERP_INSTR_BEGIN(0x47) /* FD_SBPF_OP_OR64_IMM */
562 51 : reg[ dst ] = reg_dst | (ulong)(long)(int)imm;
563 51 : FD_VM_INTERP_INSTR_END;
564 :
565 57 : FD_VM_INTERP_INSTR_BEGIN(0x4c) /* FD_SBPF_OP_OR_REG */
566 57 : reg[ dst ] = (ulong)(uint)( reg_dst | reg_src );
567 57 : FD_VM_INTERP_INSTR_END;
568 :
569 663 : FD_VM_INTERP_BRANCH_BEGIN(0x4d) /* FD_SBPF_OP_JSET_REG */
570 657 : pc += fd_ulong_if( !!(reg_dst & reg_src), offset, 0UL );
571 657 : FD_VM_INTERP_BRANCH_END;
572 :
573 48 : FD_VM_INTERP_INSTR_BEGIN(0x4e) /* FD_SBPF_OP_UDIV32_REG */
574 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
575 36 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)reg_src );
576 36 : FD_VM_INTERP_INSTR_END;
577 :
578 102 : FD_VM_INTERP_INSTR_BEGIN(0x4f) /* FD_SBPF_OP_OR64_REG */
579 102 : reg[ dst ] = reg_dst | reg_src;
580 102 : FD_VM_INTERP_INSTR_END;
581 :
582 : /* 0x50 - 0x5f ******************************************************/
583 :
584 54 : FD_VM_INTERP_INSTR_BEGIN(0x54) /* FD_SBPF_OP_AND_IMM */
585 54 : reg[ dst ] = (ulong)( (uint)reg_dst & imm );
586 54 : FD_VM_INTERP_INSTR_END;
587 :
588 31554 : FD_VM_INTERP_BRANCH_BEGIN(0x55) /* FD_SBPF_OP_JNE_IMM */
589 31548 : pc += fd_ulong_if( reg_dst!=(ulong)(long)(int)imm, offset, 0UL );
590 31548 : FD_VM_INTERP_BRANCH_END;
591 :
592 39 : FD_VM_INTERP_INSTR_BEGIN(0x56) /* FD_SBPF_OP_UDIV64_IMM */
593 39 : reg[ dst ] = reg_dst / (ulong)imm;
594 39 : FD_VM_INTERP_INSTR_END;
595 :
596 228 : FD_VM_INTERP_INSTR_BEGIN(0x57) /* FD_SBPF_OP_AND64_IMM */
597 228 : reg[ dst ] = reg_dst & (ulong)(long)(int)imm;
598 228 : FD_VM_INTERP_INSTR_END;
599 :
600 60 : FD_VM_INTERP_INSTR_BEGIN(0x5c) /* FD_SBPF_OP_AND_REG */
601 60 : reg[ dst ] = (ulong)(uint)( reg_dst & reg_src );
602 60 : FD_VM_INTERP_INSTR_END;
603 :
604 657 : FD_VM_INTERP_BRANCH_BEGIN(0x5d) /* FD_SBPF_OP_JNE_REG */
605 651 : pc += fd_ulong_if( reg_dst!=reg_src, offset, 0UL );
606 651 : FD_VM_INTERP_BRANCH_END;
607 :
608 45 : FD_VM_INTERP_INSTR_BEGIN(0x5e) /* FD_SBPF_OP_UDIV64_REG */
609 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
610 36 : reg[ dst ] = reg_dst / reg_src;
611 36 : FD_VM_INTERP_INSTR_END;
612 :
613 138 : FD_VM_INTERP_INSTR_BEGIN(0x5f) /* FD_SBPF_OP_AND64_REG */
614 138 : reg[ dst ] = reg_dst & reg_src;
615 138 : FD_VM_INTERP_INSTR_END;
616 :
617 : /* 0x60 - 0x6f ******************************************************/
618 :
619 : /* FIXME: CHECK THE CU COST MODEL FOR THESE (IS IT LIKE
620 : FD_VM_CONSUME_MEM AND NOT JUST FIXED) */
621 : /* FIXME: MEM TRACING DIAGNOSTICS GO IN HERE */
622 :
623 453 : FD_VM_INTERP_INSTR_BEGIN(0x64) /* FD_SBPF_OP_LSH_IMM */
624 453 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L291 */
625 453 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, (uint)imm ) );
626 453 : FD_VM_INTERP_INSTR_END;
627 :
628 3717 : FD_VM_INTERP_BRANCH_BEGIN(0x65) /* FD_SBPF_OP_JSGT_IMM */
629 3681 : pc += fd_ulong_if( (long)reg_dst>(long)(int)imm, offset, 0UL );
630 3681 : FD_VM_INTERP_BRANCH_END;
631 :
632 39 : FD_VM_INTERP_INSTR_BEGIN(0x66) /* FD_SBPF_OP_UREM32_IMM */
633 39 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)imm );
634 39 : FD_VM_INTERP_INSTR_END;
635 :
636 10986 : FD_VM_INTERP_INSTR_BEGIN(0x67) /* FD_SBPF_OP_LSH64_IMM */
637 10986 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L376 */
638 10986 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, imm );
639 10986 : FD_VM_INTERP_INSTR_END;
640 :
641 447 : FD_VM_INTERP_INSTR_BEGIN(0x6c) /* FD_SBPF_OP_LSH_REG */
642 447 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L292 */
643 447 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, reg_src ) );
644 447 : FD_VM_INTERP_INSTR_END;
645 :
646 3573 : FD_VM_INTERP_BRANCH_BEGIN(0x6d) /* FD_SBPF_OP_JSGT_REG */
647 3543 : pc += fd_ulong_if( (long)reg_dst>(long)reg_src, offset, 0UL );
648 3543 : FD_VM_INTERP_BRANCH_END;
649 :
650 48 : FD_VM_INTERP_INSTR_BEGIN(0x6e) /* FD_SBPF_OP_UREM32_REG */
651 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
652 36 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)reg_src );
653 36 : FD_VM_INTERP_INSTR_END;
654 :
655 9 : FD_VM_INTERP_INSTR_BEGIN(0x6f) /* FD_SBPF_OP_LSH64_REG */
656 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L377 */
657 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, reg_src );
658 9 : FD_VM_INTERP_INSTR_END;
659 :
660 : /* 0x70 - 0x7f ******************************************************/
661 :
662 9 : FD_VM_INTERP_INSTR_BEGIN(0x74) /* FD_SBPF_OP_RSH_IMM */
663 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L293 */
664 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, imm ) );
665 9 : FD_VM_INTERP_INSTR_END;
666 :
667 6714 : FD_VM_INTERP_BRANCH_BEGIN(0x75) /* FD_SBPF_OP_JSGE_IMM */
668 6648 : pc += fd_ulong_if( (long)reg_dst>=(long)(int)imm, offset, 0UL );
669 6648 : FD_VM_INTERP_BRANCH_END;
670 :
671 39 : FD_VM_INTERP_INSTR_BEGIN(0x76) /* FD_SBPF_OP_UREM64_IMM */
672 39 : reg[ dst ] = reg_dst % (ulong)imm;
673 39 : FD_VM_INTERP_INSTR_END;
674 :
675 117 : FD_VM_INTERP_INSTR_BEGIN(0x77) /* FD_SBPF_OP_RSH64_IMM */
676 117 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L378 */
677 117 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, imm );
678 117 : FD_VM_INTERP_INSTR_END;
679 :
680 9 : FD_VM_INTERP_INSTR_BEGIN(0x7c) /* FD_SBPF_OP_RSH_REG */
681 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L294 */
682 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, (uint)reg_src ) );
683 9 : FD_VM_INTERP_INSTR_END;
684 :
685 5568 : FD_VM_INTERP_BRANCH_BEGIN(0x7d) /* FD_SBPF_OP_JSGE_REG */
686 5514 : pc += fd_ulong_if( (long)reg_dst>=(long)reg_src, offset, 0UL );
687 5514 : FD_VM_INTERP_BRANCH_END;
688 :
689 45 : FD_VM_INTERP_INSTR_BEGIN(0x7e) /* FD_SBPF_OP_UREM64_REG */
690 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
691 36 : reg[ dst ] = reg_dst % reg_src;
692 36 : FD_VM_INTERP_INSTR_END;
693 :
694 9 : FD_VM_INTERP_INSTR_BEGIN(0x7f) /* FD_SBPF_OP_RSH64_REG */
695 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L379 */
696 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, reg_src );
697 9 : FD_VM_INTERP_INSTR_END;
698 :
699 : /* 0x80-0x8f ********************************************************/
700 :
701 3 : FD_VM_INTERP_INSTR_BEGIN(0x84) /* FD_SBPF_OP_NEG */
702 3 : reg[ dst ] = (ulong)( -(uint)reg_dst );
703 3 : FD_VM_INTERP_INSTR_END;
704 :
705 369 : FD_VM_INTERP_BRANCH_BEGIN(0x85) { /* FD_SBPF_OP_CALL_IMM */
706 :
707 369 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
708 369 : if( FD_UNLIKELY( !syscall ) ) { /* Optimize for the syscall case */
709 :
710 : /* Note we do the stack push before updating the pc(*). This implies
711 : that the call stack frame gets allocated _before_ checking if the
712 : call target is valid. It would be fine to switch the order
713 : though such would change the precise faulting semantics of
714 : sigtextbr and sigstack.
715 :
716 : (*)but after checking calldests, see point below. */
717 :
718 : /* Agave's order of checks
719 : (https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L565-L572):
720 : 1. Lookup imm hash in FunctionRegistry (calldests_test is our equivalent)
721 : 2. Push stack frame
722 : 3. Check PC
723 : 4. Update PC
724 :
725 : Following this precisely is impossible as our PC check also
726 : serves as a bounds check for the calldests_test call. So we
727 : have to perform step 3 before step 1. The following
728 : is a best-effort implementation that should match the VM state
729 : in all ways except error code. */
730 :
731 : /* Special case to handle entrypoint.
732 : ebpf::hash_symbol_name(b"entrypoint") = 0xb00c380, and
733 : fd_pchash_inverse( 0xb00c380U ) = 0x71e3cf81U */
734 336 : if( FD_UNLIKELY( imm==0x71e3cf81U ) ) {
735 0 : FD_VM_INTERP_STACK_PUSH;
736 0 : pc = entry_pc - 1;
737 336 : } else {
738 336 : ulong target_pc = (ulong)fd_pchash_inverse( imm );
739 336 : if( FD_UNLIKELY( target_pc>=text_cnt ) ) {
740 6 : goto sigillbr; /* different return between 0x85 and 0x8d */
741 6 : }
742 330 : if( FD_UNLIKELY( !fd_sbpf_calldests_test( calldests, target_pc ) ) ) {
743 0 : goto sigillbr;
744 0 : }
745 660 : FD_VM_INTERP_STACK_PUSH;
746 660 : pc = target_pc - 1;
747 660 : }
748 :
749 336 : } else {
750 :
751 33 : FD_VM_INTERP_SYSCALL_EXEC;
752 :
753 33 : }
754 369 : } FD_VM_INTERP_BRANCH_END;
755 :
756 : /* SIMD-0178: Static syscalls (SBPF V3+)
757 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L542-L577 */
758 240 : FD_VM_INTERP_BRANCH_BEGIN(0x85_static) { /* FD_SBPF_OP_CALL_IMM (static syscalls) */
759 :
760 240 : if( src == 0 ) {
761 : /* External syscall
762 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L545-L553 */
763 15 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
764 15 : if( FD_UNLIKELY( !syscall ) ) goto sigillbr;
765 18 : FD_VM_INTERP_SYSCALL_EXEC;
766 225 : } else if( src == 1 ) {
767 : /* Internal call
768 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L555-L563
769 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/program.rs#L97-L103 */
770 219 : long target_pc_l = fd_long_sat_add( (long)pc, fd_long_sat_add( (long)(int)imm, 1L ) );
771 219 : if( FD_UNLIKELY( target_pc_l<0L || (ulong)target_pc_l>=text_cnt ) ) goto sigillbr;
772 417 : FD_VM_INTERP_STACK_PUSH;
773 417 : pc = (ulong)target_pc_l - 1;
774 417 : } else {
775 : /* https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L574-L576 */
776 6 : goto sigillbr;
777 6 : }
778 :
779 240 : } FD_VM_INTERP_BRANCH_END;
780 :
781 39 : FD_VM_INTERP_INSTR_BEGIN(0x86) /* FD_SBPF_OP_LMUL32_IMM */
782 39 : reg[ dst ] = (ulong)( (uint)reg_dst * imm );
783 39 : FD_VM_INTERP_INSTR_END;
784 :
785 9 : FD_VM_INTERP_INSTR_BEGIN(0x87) { /* FD_SBPF_OP_STW */
786 9 : ulong vaddr = reg_dst + offset;
787 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
788 9 : int sigsegv = !haddr;
789 9 : if( FD_UNLIKELY( sigsegv ) ) {
790 6 : vm->segv_vaddr = vaddr;
791 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
792 6 : vm->segv_access_len = 4UL;
793 6 : goto sigsegv;
794 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
795 3 : fd_vm_mem_st_4( haddr, imm );
796 3 : } FD_VM_INTERP_INSTR_END;
797 :
798 48 : FD_VM_INTERP_INSTR_BEGIN(0x87depr) /* FD_SBPF_OP_NEG64 deprecated */
799 48 : reg[ dst ] = -reg_dst;
800 48 : FD_VM_INTERP_INSTR_END;
801 :
802 108 : FD_VM_INTERP_INSTR_BEGIN(0x8c) { /* FD_SBPF_OP_LDXW */
803 108 : ulong vaddr = reg_src + offset;
804 108 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_ld_sz, 0, 0UL );
805 108 : int sigsegv = !haddr;
806 108 : if( FD_UNLIKELY( sigsegv ) ) {
807 48 : vm->segv_vaddr = vaddr;
808 48 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
809 48 : vm->segv_access_len = 4UL;
810 48 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
811 48 : }
812 60 : reg[ dst ] = fd_vm_mem_ld_4( haddr );
813 60 : }
814 60 : FD_VM_INTERP_INSTR_END;
815 :
816 105 : FD_VM_INTERP_BRANCH_BEGIN(0x8d) { /* FD_SBPF_OP_CALL_REG */
817 :
818 105 : FD_VM_INTERP_STACK_PUSH;
819 :
820 : /* https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L528-L540 */
821 105 : ulong vaddr = fd_sbpf_callx_uses_src_reg_enabled( sbpf_version ) ? reg_src
822 105 : : fd_sbpf_callx_uses_dst_reg_enabled( sbpf_version ) ? reg[ dst ]
823 84 : : reg[ imm & 15U ];
824 :
825 : /* Notes: Agave checks region and target_pc before updating the pc.
826 : To match their state, we do the same, even though we could simply
827 : update the pc and let BRANCH_END fail.
828 : Also, Agave doesn't check alignment. */
829 :
830 105 : ulong region = vaddr >> 32;
831 : /* ulong align = vaddr & 7UL; */
832 105 : ulong target_pc = ((vaddr & FD_VM_OFFSET_MASK) - vm->text_off) / 8UL;
833 105 : if( FD_UNLIKELY( (region!=1UL) | (target_pc>=text_cnt) ) ) goto sigtextbr; /* Note: untaken branches don't consume BTB */
834 63 : pc = target_pc - 1;
835 :
836 63 : } FD_VM_INTERP_BRANCH_END;
837 :
838 33 : FD_VM_INTERP_INSTR_BEGIN(0x8e) /* FD_SBPF_OP_LMUL32_REG */
839 33 : reg[ dst ] = (ulong)( (uint)reg_dst * (uint)reg_src );
840 33 : FD_VM_INTERP_INSTR_END;
841 :
842 9 : FD_VM_INTERP_INSTR_BEGIN(0x8f) { /* FD_SBPF_OP_STXW */
843 9 : ulong vaddr = reg_dst + offset;
844 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
845 9 : int sigsegv = !haddr;
846 9 : if( FD_UNLIKELY( sigsegv ) ) {
847 6 : vm->segv_vaddr = vaddr;
848 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
849 6 : vm->segv_access_len = 4UL;
850 6 : goto sigsegv;
851 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
852 3 : fd_vm_mem_st_4( haddr, (uint)reg_src );
853 3 : }
854 3 : FD_VM_INTERP_INSTR_END;
855 :
856 : /* 0x90 - 0x9f ******************************************************/
857 :
858 42 : FD_VM_INTERP_INSTR_BEGIN(0x94) /* FD_SBPF_OP_MOD_IMM */
859 42 : reg[ dst ] = (ulong)( (uint)reg_dst % imm );
860 42 : FD_VM_INTERP_INSTR_END;
861 :
862 9183 : FD_VM_INTERP_BRANCH_BEGIN(0x95) /* FD_SBPF_OP_EXIT */
863 9174 : /* Agave JIT VM exit implementation analysis below.
864 9174 :
865 9174 : Agave references:
866 9174 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L503-L509
867 9174 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L697-L702 */
868 9174 : if( FD_UNLIKELY( !frame_cnt ) ) goto sigexit; /* Exit program */
869 411 : frame_cnt--;
870 411 : reg[6] = shadow[ frame_cnt ].r6;
871 411 : reg[7] = shadow[ frame_cnt ].r7;
872 411 : reg[8] = shadow[ frame_cnt ].r8;
873 411 : reg[9] = shadow[ frame_cnt ].r9;
874 411 : reg[10] = shadow[ frame_cnt ].r10;
875 411 : pc = shadow[ frame_cnt ].pc;
876 411 : FD_VM_INTERP_BRANCH_END;
877 :
878 39 : FD_VM_INTERP_INSTR_BEGIN(0x96) /* FD_SBPF_OP_LMUL64_IMM */
879 39 : reg[ dst ] = reg_dst * (ulong)(long)(int)imm;
880 39 : FD_VM_INTERP_INSTR_END;
881 :
882 9 : FD_VM_INTERP_INSTR_BEGIN(0x97) { /* FD_SBPF_OP_STQ */
883 9 : ulong vaddr = reg_dst + offset;
884 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
885 9 : int sigsegv = !haddr;
886 9 : if( FD_UNLIKELY( sigsegv ) ) {
887 6 : vm->segv_vaddr = vaddr;
888 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
889 6 : vm->segv_access_len = 8UL;
890 6 : goto sigsegv;
891 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
892 3 : fd_vm_mem_st_8( haddr, (ulong)(long)(int)imm );
893 3 : }
894 3 : FD_VM_INTERP_INSTR_END;
895 :
896 3549 : FD_VM_INTERP_INSTR_BEGIN(0x9c) { /* FD_SBPF_OP_LDXQ */
897 3549 : ulong vaddr = reg_src + offset;
898 3549 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_ld_sz, 0, 0UL );
899 3549 : int sigsegv = !haddr;
900 3549 : if( FD_UNLIKELY( sigsegv ) ) {
901 42 : vm->segv_vaddr = vaddr;
902 42 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
903 42 : vm->segv_access_len = 8UL;
904 42 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
905 42 : }
906 3507 : reg[ dst ] = fd_vm_mem_ld_8( haddr );
907 3507 : }
908 3507 : FD_VM_INTERP_INSTR_END;
909 :
910 57 : FD_VM_INTERP_INSTR_BEGIN(0x9e) /* FD_SBPF_OP_LMUL64_REG */
911 57 : reg[ dst ] = reg_dst * reg_src;
912 57 : FD_VM_INTERP_INSTR_END;
913 :
914 2310 : FD_VM_INTERP_INSTR_BEGIN(0x9f) { /* FD_SBPF_OP_STXQ */
915 2310 : ulong vaddr = reg_dst + offset;
916 2310 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
917 2310 : int sigsegv = !haddr;
918 2310 : if( FD_UNLIKELY( sigsegv ) ) {
919 6 : vm->segv_vaddr = vaddr;
920 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
921 6 : vm->segv_access_len = 8UL;
922 6 : goto sigsegv;
923 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
924 2304 : fd_vm_mem_st_8( haddr, reg_src );
925 2304 : }
926 2304 : FD_VM_INTERP_INSTR_END;
927 :
928 42 : FD_VM_INTERP_INSTR_BEGIN(0x97depr) /* FD_SBPF_OP_MOD64_IMM */
929 42 : reg[ dst ] = reg_dst % (ulong)(long)(int)imm;
930 42 : FD_VM_INTERP_INSTR_END;
931 :
932 57 : FD_VM_INTERP_INSTR_BEGIN(0x9cdepr) /* FD_SBPF_OP_MOD_REG */
933 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
934 42 : reg[ dst ] = (ulong)( ((uint)reg_dst % (uint)reg_src) );
935 42 : FD_VM_INTERP_INSTR_END;
936 :
937 54 : FD_VM_INTERP_INSTR_BEGIN(0x9fdepr) /* FD_SBPF_OP_MOD64_REG */
938 54 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
939 42 : reg[ dst ] = reg_dst % reg_src;
940 42 : FD_VM_INTERP_INSTR_END;
941 :
942 : /* 0xa0 - 0xaf ******************************************************/
943 :
944 9 : FD_VM_INTERP_INSTR_BEGIN(0xa4) /* FD_SBPF_OP_XOR_IMM */
945 9 : reg[ dst ] = (ulong)( (uint)reg_dst ^ imm );
946 9 : FD_VM_INTERP_INSTR_END;
947 :
948 3126 : FD_VM_INTERP_BRANCH_BEGIN(0xa5) /* FD_SBPF_OP_JLT_IMM */
949 3096 : pc += fd_ulong_if( reg_dst<(ulong)(long)(int)imm, offset, 0UL );
950 3096 : FD_VM_INTERP_BRANCH_END;
951 :
952 39 : FD_VM_INTERP_INSTR_BEGIN(0xa7) /* FD_SBPF_OP_XOR64_IMM */
953 39 : reg[ dst ] = reg_dst ^ (ulong)(long)(int)imm;
954 39 : FD_VM_INTERP_INSTR_END;
955 :
956 9 : FD_VM_INTERP_INSTR_BEGIN(0xac) /* FD_SBPF_OP_XOR_REG */
957 9 : reg[ dst ] = (ulong)(uint)( reg_dst ^ reg_src );
958 9 : FD_VM_INTERP_INSTR_END;
959 :
960 2517 : FD_VM_INTERP_BRANCH_BEGIN(0xad) /* FD_SBPF_OP_JLT_REG */
961 2493 : pc += fd_ulong_if( reg_dst<reg_src, offset, 0UL );
962 2493 : FD_VM_INTERP_BRANCH_END;
963 :
964 21 : FD_VM_INTERP_INSTR_BEGIN(0xaf) /* FD_SBPF_OP_XOR64_REG */
965 21 : reg[ dst ] = reg_dst ^ reg_src;
966 21 : FD_VM_INTERP_INSTR_END;
967 :
968 : /* 0xb0 - 0xbf ******************************************************/
969 :
970 330 : FD_VM_INTERP_INSTR_BEGIN(0xb4) /* FD_SBPF_OP_MOV_IMM */
971 330 : reg[ dst ] = (ulong)imm;
972 330 : FD_VM_INTERP_INSTR_END;
973 :
974 6126 : FD_VM_INTERP_BRANCH_BEGIN(0xb5) /* FD_SBPF_OP_JLE_IMM */
975 6066 : pc += fd_ulong_if( reg_dst<=(ulong)(long)(int)imm, offset, 0UL );
976 6066 : FD_VM_INTERP_BRANCH_END;
977 :
978 3 : FD_VM_INTERP_INSTR_BEGIN(0xb6) /* FD_SBPF_OP_SHMUL64_IMM */
979 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)(int)imm ) >> 64 );
980 3 : FD_VM_INTERP_INSTR_END;
981 :
982 126402 : FD_VM_INTERP_INSTR_BEGIN(0xb7) /* FD_SBPF_OP_MOV64_IMM */
983 126402 : reg[ dst ] = (ulong)(long)(int)imm;
984 126402 : FD_VM_INTERP_INSTR_END;
985 :
986 3 : FD_VM_INTERP_INSTR_BEGIN(0xbc) /* FD_SBPF_OP_MOV_REG */
987 3 : reg[ dst ] = (ulong)(long)(int)reg_src;
988 3 : FD_VM_INTERP_INSTR_END;
989 :
990 15 : FD_VM_INTERP_INSTR_BEGIN(0xbcdepr) /* FD_SBPF_OP_MOV_REG deprecated SIMD-1074 */
991 15 : reg[ dst ] = (ulong)(uint)reg_src;
992 15 : FD_VM_INTERP_INSTR_END;
993 :
994 4917 : FD_VM_INTERP_BRANCH_BEGIN(0xbd) /* FD_SBPF_OP_JLE_REG */
995 4869 : pc += fd_ulong_if( reg_dst<=reg_src, offset, 0UL );
996 4869 : FD_VM_INTERP_BRANCH_END;
997 :
998 3 : FD_VM_INTERP_INSTR_BEGIN(0xbe) /* FD_SBPF_OP_SHMUL64_REG */
999 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)reg_src ) >> 64 );
1000 3 : FD_VM_INTERP_INSTR_END;
1001 :
1002 87969 : FD_VM_INTERP_INSTR_BEGIN(0xbf) /* FD_SBPF_OP_MOV64_REG */
1003 87969 : reg[ dst ] = reg_src;
1004 87969 : FD_VM_INTERP_INSTR_END;
1005 :
1006 : /* 0xc0 - 0xcf ******************************************************/
1007 :
1008 147 : FD_VM_INTERP_INSTR_BEGIN(0xc4) /* FD_SBPF_OP_ARSH_IMM */
1009 147 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, imm ) );
1010 147 : FD_VM_INTERP_INSTR_END;
1011 :
1012 3102 : FD_VM_INTERP_BRANCH_BEGIN(0xc5) /* FD_SBPF_OP_JSLT_IMM */ /* FIXME: CHECK IMM SIGN EXTENSION */
1013 3072 : pc += fd_ulong_if( (long)reg_dst<(long)(int)imm, offset, 0UL );
1014 3072 : FD_VM_INTERP_BRANCH_END;
1015 :
1016 45 : FD_VM_INTERP_INSTR_BEGIN(0xc6) /* FD_SBPF_OP_SDIV32_IMM */
1017 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1018 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)imm );
1019 39 : FD_VM_INTERP_INSTR_END;
1020 :
1021 330 : FD_VM_INTERP_INSTR_BEGIN(0xc7) /* FD_SBPF_OP_ARSH64_IMM */
1022 330 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, imm ) );
1023 330 : FD_VM_INTERP_INSTR_END;
1024 :
1025 96 : FD_VM_INTERP_INSTR_BEGIN(0xcc) /* FD_SBPF_OP_ARSH_REG */
1026 96 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, (uint)reg_src ) );
1027 96 : FD_VM_INTERP_INSTR_END;
1028 :
1029 3108 : FD_VM_INTERP_BRANCH_BEGIN(0xcd) /* FD_SBPF_OP_JSLT_REG */
1030 3078 : pc += fd_ulong_if( (long)reg_dst<(long)reg_src, offset, 0UL );
1031 3078 : FD_VM_INTERP_BRANCH_END;
1032 :
1033 54 : FD_VM_INTERP_INSTR_BEGIN(0xce) /* FD_SBPF_OP_SDIV32_REG */
1034 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1035 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1036 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)reg_src );
1037 36 : FD_VM_INTERP_INSTR_END;
1038 :
1039 93 : FD_VM_INTERP_INSTR_BEGIN(0xcf) /* FD_SBPF_OP_ARSH64_REG */
1040 93 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, reg_src ) );
1041 93 : FD_VM_INTERP_INSTR_END;
1042 :
1043 : /* 0xd0 - 0xdf ******************************************************/
1044 :
1045 21 : FD_VM_INTERP_INSTR_BEGIN(0xd4) /* FD_SBPF_OP_END_LE */
1046 21 : switch( imm ) {
1047 9 : case 16U: reg[ dst ] = (ushort)reg_dst; break;
1048 3 : case 32U: reg[ dst ] = (uint) reg_dst; break;
1049 3 : case 64U: break;
1050 6 : default: goto siginv;
1051 21 : }
1052 15 : FD_VM_INTERP_INSTR_END;
1053 :
1054 2460 : FD_VM_INTERP_BRANCH_BEGIN(0xd5) /* FD_SBPF_OP_JSLE_IMM */
1055 2436 : pc += fd_ulong_if( (long)reg_dst<=(long)(int)imm, offset, 0UL );
1056 2436 : FD_VM_INTERP_BRANCH_END;
1057 :
1058 42 : FD_VM_INTERP_INSTR_BEGIN(0xd6) /* FD_SBPF_OP_SDIV64_IMM */
1059 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1060 39 : reg[ dst ] = (ulong)( (long)reg_dst / (long)(int)imm );
1061 39 : FD_VM_INTERP_INSTR_END;
1062 :
1063 72 : FD_VM_INTERP_INSTR_BEGIN(0xdc) /* FD_SBPF_OP_END_BE */
1064 72 : switch( imm ) {
1065 39 : case 16U: reg[ dst ] = (ulong)fd_ushort_bswap( (ushort)reg_dst ); break;
1066 12 : case 32U: reg[ dst ] = (ulong)fd_uint_bswap ( (uint) reg_dst ); break;
1067 9 : case 64U: reg[ dst ] = fd_ulong_bswap ( (ulong) reg_dst ); break;
1068 12 : default: goto siginv;
1069 72 : }
1070 60 : FD_VM_INTERP_INSTR_END;
1071 :
1072 1854 : FD_VM_INTERP_BRANCH_BEGIN(0xdd) /* FD_SBPF_OP_JSLE_REG */
1073 1836 : pc += fd_ulong_if( (long)reg_dst<=(long)reg_src, offset, 0UL );
1074 1836 : FD_VM_INTERP_BRANCH_END;
1075 :
1076 48 : FD_VM_INTERP_INSTR_BEGIN(0xde) /* FD_SBPF_OP_SDIV64_REG */
1077 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1078 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1079 36 : reg[ dst ] = (ulong)( (long)reg_dst / (long)reg_src );
1080 36 : FD_VM_INTERP_INSTR_END;
1081 :
1082 : /* 0xe0 - 0xef ******************************************************/
1083 :
1084 45 : FD_VM_INTERP_INSTR_BEGIN(0xe6) /* FD_SBPF_OP_SREM32_IMM */
1085 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1086 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)imm );
1087 39 : FD_VM_INTERP_INSTR_END;
1088 :
1089 54 : FD_VM_INTERP_INSTR_BEGIN(0xee) /* FD_SBPF_OP_SREM32_REG */
1090 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1091 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1092 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)reg_src );
1093 36 : FD_VM_INTERP_INSTR_END;
1094 :
1095 : /* 0xf0 - 0xff ******************************************************/
1096 :
1097 42 : FD_VM_INTERP_INSTR_BEGIN(0xf6) /* FD_SBPF_OP_SREM64_IMM */
1098 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1099 39 : reg[ dst ] = (ulong)( (long)reg_dst % (long)(int)imm );
1100 39 : FD_VM_INTERP_INSTR_END;
1101 :
1102 21 : FD_VM_INTERP_INSTR_BEGIN(0xf7) /* FD_SBPF_OP_HOR64 */
1103 21 : reg[ dst ] = reg_dst | (((ulong)imm) << 32);
1104 21 : FD_VM_INTERP_INSTR_END;
1105 :
1106 48 : FD_VM_INTERP_INSTR_BEGIN(0xfe) /* FD_SBPF_OP_SREM64_REG */
1107 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1108 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1109 36 : reg[ dst ] = (ulong)( (long)reg_dst % (long)reg_src );
1110 36 : FD_VM_INTERP_INSTR_END;
1111 :
1112 : /* SIMD-0377: JMP32
1113 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L480-L501
1114 :
1115 : 0x16 - 0xde ******************************************************/
1116 :
1117 1548 : FD_VM_INTERP_BRANCH_BEGIN(0x16_jmp32) /* FD_SBPF_OP_JEQ32_IMM */
1118 1533 : pc += fd_ulong_if( (uint)reg_dst==(uint)imm, offset, 0UL );
1119 1533 : FD_VM_INTERP_BRANCH_END;
1120 :
1121 630 : FD_VM_INTERP_BRANCH_BEGIN(0x1e_jmp32) /* FD_SBPF_OP_JEQ32_REG */
1122 624 : pc += fd_ulong_if( (uint)reg_dst==(uint)reg_src, offset, 0UL );
1123 624 : FD_VM_INTERP_BRANCH_END;
1124 :
1125 942 : FD_VM_INTERP_BRANCH_BEGIN(0x26_jmp32) /* FD_SBPF_OP_JGT32_IMM */
1126 933 : pc += fd_ulong_if( (uint)reg_dst>(uint)imm, offset, 0UL );
1127 933 : FD_VM_INTERP_BRANCH_END;
1128 :
1129 321 : FD_VM_INTERP_BRANCH_BEGIN(0x2e_jmp32) /* FD_SBPF_OP_JGT32_REG */
1130 318 : pc += fd_ulong_if( (uint)reg_dst>(uint)reg_src, offset, 0UL );
1131 318 : FD_VM_INTERP_BRANCH_END;
1132 :
1133 927 : FD_VM_INTERP_BRANCH_BEGIN(0x36_jmp32) /* FD_SBPF_OP_JGE32_IMM */
1134 918 : pc += fd_ulong_if( (uint)reg_dst>=(uint)imm, offset, 0UL );
1135 918 : FD_VM_INTERP_BRANCH_END;
1136 :
1137 318 : FD_VM_INTERP_BRANCH_BEGIN(0x3e_jmp32) /* FD_SBPF_OP_JGE32_REG */
1138 315 : pc += fd_ulong_if( (uint)reg_dst>=(uint)reg_src, offset, 0UL );
1139 315 : FD_VM_INTERP_BRANCH_END;
1140 :
1141 939 : FD_VM_INTERP_BRANCH_BEGIN(0x46_jmp32) /* FD_SBPF_OP_JSET32_IMM */
1142 930 : pc += fd_ulong_if( !!((uint)reg_dst & (uint)imm), offset, 0UL );
1143 930 : FD_VM_INTERP_BRANCH_END;
1144 :
1145 324 : FD_VM_INTERP_BRANCH_BEGIN(0x4e_jmp32) /* FD_SBPF_OP_JSET32_REG */
1146 321 : pc += fd_ulong_if( !!((uint)reg_dst & (uint)reg_src), offset, 0UL );
1147 321 : FD_VM_INTERP_BRANCH_END;
1148 :
1149 321 : FD_VM_INTERP_BRANCH_BEGIN(0x56_jmp32) /* FD_SBPF_OP_JNE32_IMM */
1150 318 : pc += fd_ulong_if( (uint)reg_dst!=(uint)imm, offset, 0UL );
1151 318 : FD_VM_INTERP_BRANCH_END;
1152 :
1153 324 : FD_VM_INTERP_BRANCH_BEGIN(0x5e_jmp32) /* FD_SBPF_OP_JNE32_REG */
1154 321 : pc += fd_ulong_if( (uint)reg_dst!=(uint)reg_src, offset, 0UL );
1155 321 : FD_VM_INTERP_BRANCH_END;
1156 :
1157 1248 : FD_VM_INTERP_BRANCH_BEGIN(0x66_jmp32) /* FD_SBPF_OP_JSGT32_IMM */
1158 1236 : pc += fd_ulong_if( (int)reg_dst>(int)imm, offset, 0UL );
1159 1236 : FD_VM_INTERP_BRANCH_END;
1160 :
1161 321 : FD_VM_INTERP_BRANCH_BEGIN(0x6e_jmp32) /* FD_SBPF_OP_JSGT32_REG */
1162 318 : pc += fd_ulong_if( (int)reg_dst>(int)reg_src, offset, 0UL );
1163 318 : FD_VM_INTERP_BRANCH_END;
1164 :
1165 627 : FD_VM_INTERP_BRANCH_BEGIN(0x76_jmp32) /* FD_SBPF_OP_JSGE32_IMM */
1166 621 : pc += fd_ulong_if( (int)reg_dst>=(int)imm, offset, 0UL );
1167 621 : FD_VM_INTERP_BRANCH_END;
1168 :
1169 318 : FD_VM_INTERP_BRANCH_BEGIN(0x7e_jmp32) /* FD_SBPF_OP_JSGE32_REG */
1170 315 : pc += fd_ulong_if( (int)reg_dst>=(int)reg_src, offset, 0UL );
1171 315 : FD_VM_INTERP_BRANCH_END;
1172 :
1173 627 : FD_VM_INTERP_BRANCH_BEGIN(0xa6_jmp32) /* FD_SBPF_OP_JLT32_IMM */
1174 621 : pc += fd_ulong_if( (uint)reg_dst<(uint)imm, offset, 0UL );
1175 621 : FD_VM_INTERP_BRANCH_END;
1176 :
1177 318 : FD_VM_INTERP_BRANCH_BEGIN(0xae_jmp32) /* FD_SBPF_OP_JLT32_REG */
1178 315 : pc += fd_ulong_if( (uint)reg_dst<(uint)reg_src, offset, 0UL );
1179 315 : FD_VM_INTERP_BRANCH_END;
1180 :
1181 621 : FD_VM_INTERP_BRANCH_BEGIN(0xb6_jmp32) /* FD_SBPF_OP_JLE32_IMM */
1182 615 : pc += fd_ulong_if( (uint)reg_dst<=(uint)imm, offset, 0UL );
1183 615 : FD_VM_INTERP_BRANCH_END;
1184 :
1185 318 : FD_VM_INTERP_BRANCH_BEGIN(0xbe_jmp32) /* FD_SBPF_OP_JLE32_REG */
1186 315 : pc += fd_ulong_if( (uint)reg_dst<=(uint)reg_src, offset, 0UL );
1187 315 : FD_VM_INTERP_BRANCH_END;
1188 :
1189 327 : FD_VM_INTERP_BRANCH_BEGIN(0xc6_jmp32) /* FD_SBPF_OP_JSLT32_IMM */
1190 324 : pc += fd_ulong_if( (int)reg_dst<(int)imm, offset, 0UL );
1191 324 : FD_VM_INTERP_BRANCH_END;
1192 :
1193 318 : FD_VM_INTERP_BRANCH_BEGIN(0xce_jmp32) /* FD_SBPF_OP_JSLT32_REG */
1194 315 : pc += fd_ulong_if( (int)reg_dst<(int)reg_src, offset, 0UL );
1195 315 : FD_VM_INTERP_BRANCH_END;
1196 :
1197 621 : FD_VM_INTERP_BRANCH_BEGIN(0xd6_jmp32) /* FD_SBPF_OP_JSLE32_IMM */
1198 615 : pc += fd_ulong_if( (int)reg_dst<=(int)imm, offset, 0UL );
1199 615 : FD_VM_INTERP_BRANCH_END;
1200 :
1201 318 : FD_VM_INTERP_BRANCH_BEGIN(0xde_jmp32) /* FD_SBPF_OP_JSLE32_REG */
1202 315 : pc += fd_ulong_if( (int)reg_dst<=(int)reg_src, offset, 0UL );
1203 315 : FD_VM_INTERP_BRANCH_END;
1204 :
1205 : /* FIXME: sigbus/sigrdonly are mapped to sigsegv for simplicity
1206 : currently but could be enabled if desired. */
1207 :
1208 : /* Note: sigtextbr is for sigtext errors that occur on branching
1209 : instructions (i.e., prefixed with FD_VM_INTERP_BRANCH_BEGIN).
1210 : We skip a repeat ic accumulation in FD_VM_INTERP_FAULT */
1211 :
1212 : /* FD_VM_INTERP_FAULT accumulates to ic and cu all non-faulting
1213 : instructions preceding a fault generated by a non-branching
1214 : instruction. When a non-branching instruction faults, pc is at the
1215 : instruction and the number of non-branching instructions that have
1216 : not yet been reflected in ic and cu is:
1217 :
1218 : pc - pc0 + 1 - ic_correction
1219 :
1220 : as per the accounting described above. +1 to include the faulting
1221 : instruction itself.
1222 :
1223 : Note that, for a sigtext caused by a branch instruction, pc0==pc
1224 : (from the BRANCH_END) and ic_correction==0 (from the BRANCH_BEGIN)
1225 : such that the below does not change the already current values in
1226 : ic and cu. Thus it also "does the right thing" in both the
1227 : non-branching and branching cases for sigtext. The same applies to
1228 : sigsplit. */
1229 :
1230 0 : #define FD_VM_INTERP_FAULT \
1231 1662 : ic_correction = pc - pc0 + 1UL - ic_correction; \
1232 1662 : ic += ic_correction; \
1233 1662 : if ( FD_UNLIKELY( ic_correction > cu ) ) err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; \
1234 1662 : cu -= fd_ulong_min( ic_correction, cu )
1235 :
1236 96 : sigtext_or_sigcost:
1237 : /* If the block text limit is exceeded, sigtext_or_sigcost will be
1238 : thrown. This could either be because the pc has exceeded the text
1239 : section, or we have exhausted our CU budget. The block text limit
1240 : is used to combine both of these checks into one, primarily for
1241 : performance reasons. We then disambiguate the scenarios in this
1242 : signal handler, as hitting either of these cases is rare. */
1243 96 : if( pc<text_cnt ) goto sigcost; else goto sigtext;
1244 87 : sigtext: err = FD_VM_ERR_EBPF_EXECUTION_OVERRUN; FD_VM_INTERP_FAULT; goto interp_halt;
1245 42 : sigtextbr: err = FD_VM_ERR_EBPF_CALL_OUTSIDE_TEXT_SEGMENT; /* ic current */ /* cu current */ goto interp_halt;
1246 3 : sigstack: err = FD_VM_ERR_EBPF_CALL_DEPTH_EXCEEDED; /* ic current */ /* cu current */ goto interp_halt;
1247 1179 : sigill: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; FD_VM_INTERP_FAULT; goto interp_halt;
1248 27 : sigillbr: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1249 18 : siginv: err = FD_VM_ERR_EBPF_INVALID_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1250 222 : sigsegv: err = fd_vm_generate_access_violation( vm->segv_vaddr, vm->sbpf_version ); FD_VM_INTERP_FAULT; goto interp_halt;
1251 816 : sigcost: err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; /* ic current */ cu = 0UL; goto interp_halt;
1252 0 : sigsyscall: err = FD_VM_ERR_EBPF_SYSCALL_ERROR; /* ic current */ /* cu current */ goto interp_halt;
1253 138 : sigfpe: err = FD_VM_ERR_EBPF_DIVIDE_BY_ZERO; FD_VM_INTERP_FAULT; goto interp_halt;
1254 36 : sigfpeof: err = FD_VM_ERR_EBPF_DIVIDE_OVERFLOW; FD_VM_INTERP_FAULT; goto interp_halt;
1255 8763 : sigexit: /* err current */ /* ic current */ /* cu current */ goto interp_halt;
1256 :
1257 0 : #undef FD_VM_INTERP_FAULT
1258 :
1259 11331 : interp_halt:
1260 :
1261 : /* Pack the unpacked execution state into vm to give a precise view of
1262 : the execution when the vm halted. */
1263 :
1264 11331 : vm->pc = pc;
1265 11331 : vm->ic = ic;
1266 11331 : vm->cu = cu;
1267 11331 : vm->frame_cnt = frame_cnt;
1268 :
1269 11331 : # undef FD_VM_INTERP_STACK_PUSH
1270 :
1271 11331 : # undef FD_VM_INTERP_BRANCH_END
1272 11331 : # undef FD_VM_INTERP_BRANCH_BEGIN
1273 :
1274 11331 : # undef FD_VM_INTERP_BLOCK_TEXT_LIMIT
1275 :
1276 11331 : # undef FD_VM_INTERP_INSTR_END
1277 11331 : # undef FD_VM_INTERP_INSTR_BEGIN
1278 11331 : # undef FD_VM_INTERP_INSTR_EXEC
1279 :
1280 11331 : # if defined(__clang__)
1281 11331 : # pragma clang diagnostic pop
1282 11331 : # endif
1283 :
1284 11331 : # if defined(__GNUC__)
1285 11331 : # pragma GCC diagnostic pop
1286 11331 : # endif
1287 :
1288 : /* Agave/JIT CU model analysis (and why we are conformant!):
1289 :
1290 : The Agave JIT employs a similar strategy of accumulating instructions
1291 : in a linear run and processing them at the start of a new linear
1292 : run/branch (side note: the JIT treats the LDQ instruction as a "branch"
1293 : that jumps pc + 2).
1294 :
1295 : In what is assumed to be an act of register conservation, the JIT
1296 : uses a catch-all "instruction meter" (IM) register (REGISTER_INSTRUCTION_METER)
1297 : that represents two different interpretations of the question
1298 : "how many instructions can I execute?".
1299 :
1300 : The IM, depending on where we are in the execution, either represents:
1301 : 1. IM => The number of instructions remaining before exhausting CU
1302 : budget. This is analogous to vm->cu in our interpreter.
1303 : 2. IM' => The last pc you can execute in the current linear run before
1304 : exhausting CU budget. Mathematically, IM' = IM + pc0
1305 : where pc0, just like our definition, is the start of the linear run.
1306 :
1307 : Note: IM' can go past the actual basic block/segment. In-fact,
1308 : it typically does, and implies we can execute the full block without
1309 : exhausting CU budget (reminder that LDQ is treated as a branch).
1310 :
1311 : By default, the IM' form is used during execution. The IM form is used:
1312 : - (transiently) during the processing of a branch instruction
1313 : - in post-VM cleanup (updates EbpfVm::previous_instruction_meter).
1314 :
1315 : When a branch instruction is encountered, the JIT checks
1316 : for CU exhaustion with pc > IM', and throws an exception if so. This is valid,
1317 : because as described above, IM' is the largest PC you can reach.
1318 :
1319 : If we haven't exhausted our CU limit, it updates IM':
1320 : 1. IM = IM' - (pc + 1) # Note that IM' at this point is IM + pc0',
1321 : # where pc0' is the start of the current linear run.
1322 : 2. IM' = IM + pc0 # pc0 is the start of the new linear run (typically the target pc)
1323 :
1324 : Code (that does the above in one ALU instruction):
1325 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L891
1326 :
1327 :
1328 : ### How does this relate to our interpreter?
1329 :
1330 : This process is similar to FD_VM_INTERP_BRANCH_BEGIN.
1331 : We just deal with the IM form throughout (with vm->cu and ic_correction).
1332 : If we break down step 1 from above with what we know about IM and IM',
1333 : we get the following:
1334 : 1. IM = IM' - (pc + 1)
1335 : IM = (IM + pc0') - (pc + 1)
1336 : IM = IM + (pc0' - (pc + 1))
1337 : IM = IM - ((pc + 1) - pc0')
1338 : IM = IM - ic_correction
1339 : Here, ((pc + 1) - pc0') is the number of instructions executed in the current
1340 : linear run. This is the same as our ic_correction(*) in FD_VM_INTERP_BRANCH_BEGIN.
1341 :
1342 : If we replace IM with cu, this effectively becomes the
1343 : cu -= ic_correction
1344 : line in FD_VM_INTERP_BRANCH_BEGIN.
1345 :
1346 : (*) Note: ic_correction (also) takes two forms. It is either the instruction
1347 : accumulator or the number of instructions executed in the current linear run.
1348 : It (transiently) takes the latter form during FD_VM_INTERP_BRANCH_BEGIN and
1349 : FD_VM_INTERP_FAULT, and the former form otherwise.
1350 : */
1351 :
1352 : /* (WIP) Precise faulting and the Agave JIT:
1353 :
1354 : Since the cost model is a part of consensus, we need to conform with the Agave/JIT
1355 : cost model 1:1. To achieve that, our faulting model also needs to match precisely. This
1356 : section covers the various faults that the respective VMs implement and how they match.
1357 :
1358 : # Normal VM exit (sigexit):
1359 : VM exit instruction entrypoint: https://github.com/solana-labs/rbpf/blob/12237895305ab38514be865ebed6268553e4f589/src/jit.rs#L698-L708
1360 :
1361 : Pseudocode (with FD semantics):
1362 : ```
1363 : # pc is at the exit instruction
1364 : # pc0 is the start of the current linear run
1365 : if (frame_cnt == 0) {
1366 : goto sigexit;
1367 : }
1368 : ...
1369 :
1370 : sigexit:
1371 : if IM' <= pc {
1372 : goto sigcost;
1373 : } else {
1374 : goto interp_halt;
1375 : }
1376 : ```
1377 :
1378 : Breaking down the IM' < pc check:
1379 : - IM' = IM + pc0
1380 : - pc = ic + pc0, where (ic + 1) is the number of instructions executed in the current linear run
1381 :
1382 : IM' <= pc
1383 : IM + pc0 <= ic + pc0
1384 : IM <= ic
1385 : IM <= pc - pc0
1386 : IM < pc - pc0 + 1 # all unsigned integers
1387 : IM < ic_correction
1388 :
1389 : This is analogous to the ic_correction>cu check in VM_INTERP_BRANCH_BEGIN.
1390 :
1391 : # (TODO) Text Overrun (sigtext/sigsplit):
1392 :
1393 : */
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