Line data Source code
1 : /* This is the VM SBPF interpreter core. The caller unpacks the VM
2 : state and then just lets execution continue into this (or jumps to
3 : interp_exec) to start running. The VM will run until it halts or
4 : faults. On normal termination, it will branch to interp_halt to
5 : exit. Each fault has its own exit label to allow the caller to
6 : handle individually. */
7 :
8 : /* FIXME: SIGILLS FOR VARIOUS THINGS THAT HAVE UNNECESSARY BITS IN IMM
9 : SET? (LIKE WIDE SHIFTS?) */
10 :
11 0 : # if defined(__GNUC__) /* -Wpedantic rejects labels as values and rejects goto *expr */
12 0 : # pragma GCC diagnostic push
13 0 : # pragma GCC diagnostic ignored "-Wpedantic"
14 0 : # endif
15 :
16 0 : # if defined(__clang__) /* Clang is differently picky about labels as values and goto *expr */
17 0 : # pragma clang diagnostic push
18 0 : # pragma clang diagnostic ignored "-Wpedantic"
19 0 : # pragma clang diagnostic ignored "-Wgnu-label-as-value"
20 0 : # endif
21 :
22 : /* Include the jump table */
23 :
24 8847 : # include "fd_vm_interp_jump_table.c"
25 :
26 : /* Update the jump table based on SBPF version */
27 :
28 0 : ulong sbpf_version = vm->sbpf_version;
29 :
30 : /* Unpack the VM state */
31 :
32 0 : ulong pc = vm->pc;
33 0 : ulong ic = vm->ic;
34 0 : ulong cu = vm->cu;
35 0 : ulong frame_cnt = vm->frame_cnt;
36 :
37 0 : void const * const * const version_interp_jump_table = interp_jump_table[ sbpf_version ];
38 :
39 : /* FD_VM_INTERP_INSTR_EXEC loads the first word of the instruction at
40 : pc, parses it, fetches the associated register values and then
41 : jumps to the code that executes the instruction. On normal
42 : instruction execution, the pc will be updated and
43 : FD_VM_INTERP_INSTR_EXEC will be invoked again to do the next
44 : instruction. After a normal halt, this will branch to interp_halt.
45 : Otherwise, it will branch to the appropriate normal termination. */
46 :
47 0 : ulong instr;
48 0 : ulong opcode;
49 0 : ulong dst;
50 0 : ulong src;
51 0 : ulong offset; /* offset is 16-bit but always sign extended, so we handle cast once */
52 0 : uint imm;
53 0 : ulong reg_dst;
54 0 : ulong reg_src;
55 :
56 : /* These mimic the exact Rust semantics for wrapping_shl and wrapping_shr. */
57 :
58 : /* u64::wrapping_shl: a.unchecked_shl(b & (64 - 1))
59 :
60 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shl
61 : */
62 465 : #define FD_RUST_ULONG_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 63 ) ))
63 :
64 : /* u64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
65 :
66 : https://doc.rust-lang.org/std/primitive.u64.html#method.wrapping_shr
67 : */
68 21 : #define FD_RUST_ULONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
69 :
70 : /* u32::wrapping_shl: a.unchecked_shl(b & (32 - 1))
71 :
72 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shl
73 : */
74 900 : #define FD_RUST_UINT_WRAPPING_SHL( a, b ) ((a) << ( (b) & ( 31 ) ))
75 :
76 : /* u32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
77 :
78 : https://doc.rust-lang.org/std/primitive.u32.html#method.wrapping_shr
79 : */
80 18 : #define FD_RUST_UINT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
81 :
82 : /* i32::wrapping_shr: a.unchecked_shr(b & (32 - 1))
83 :
84 : https://doc.rust-lang.org/std/primitive.i32.html#method.wrapping_shr
85 : */
86 243 : #define FD_RUST_INT_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 31 ) ))
87 :
88 : /* i64::wrapping_shr: a.unchecked_shr(b & (64 - 1))
89 :
90 : https://doc.rust-lang.org/std/primitive.i64.html#method.wrapping_shr
91 : */
92 228 : #define FD_RUST_LONG_WRAPPING_SHR( a, b ) ((a) >> ( (b) & ( 63 ) ))
93 :
94 :
95 0 : # define FD_VM_INTERP_INSTR_EXEC \
96 396855 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext; /* Note: untaken branches don't consume BTB */ \
97 396855 : instr = text[ pc ]; /* Guaranteed in-bounds */ \
98 396720 : opcode = fd_vm_instr_opcode( instr ); /* in [0,256) even if malformed */ \
99 396720 : dst = fd_vm_instr_dst ( instr ); /* in [0, 16) even if malformed */ \
100 396720 : src = fd_vm_instr_src ( instr ); /* in [0, 16) even if malformed */ \
101 396720 : offset = fd_vm_instr_offset( instr ); /* in [-2^15,2^15) even if malformed */ \
102 396720 : imm = fd_vm_instr_imm ( instr ); /* in [0,2^32) even if malformed */ \
103 396720 : reg_dst = reg[ dst ]; /* Guaranteed in-bounds */ \
104 396720 : reg_src = reg[ src ]; /* Guaranteed in-bounds */ \
105 396720 : goto *version_interp_jump_table[ opcode ] /* Guaranteed in-bounds */
106 :
107 : /* FD_VM_INTERP_SYSCALL_EXEC
108 : (macro to handle the logic of 0x85 pre- and post- SIMD-0178: static syscalls)
109 :
110 : Setup.
111 : Update the vm with the current vm execution state for the
112 : syscall. Note that BRANCH_BEGIN has pc at the syscall and
113 : already updated ic and cu to reflect all instructions up to
114 : and including the syscall instruction itself.
115 :
116 : Execution.
117 : Do the syscall. We use ret reduce the risk of the syscall
118 : accidentally modifying other registers (note however since a
119 : syscall has the vm handle it still do arbitrary modifications
120 : to the vm state) and the risk of a pointer escape on reg from
121 : inhibiting compiler optimizations (this risk is likely low in
122 : as this is the only point in the whole interpreter core that
123 : calls outside this translation unit).
124 : At this point, vm->cu is positive.
125 :
126 : Error handling.
127 : If we trust syscall implementations to handle the vm state
128 : correctly, the below could be implemented as unpacking the vm
129 : state and jumping to sigsys on error. But we provide some
130 : extra protection to make various strong guarantees:
131 :
132 : - We do not let the syscall modify pc currently as nothing
133 : requires this and it reduces risk of a syscall bug mucking
134 : up the interpreter. If there ever was a syscall that
135 : needed to modify the pc (e.g. a syscall that has execution
136 : resume from a different location than the instruction
137 : following the syscall), do "pc = vm->pc" below.
138 :
139 : - We do not let the syscall modify ic currently as nothing
140 : requires this and it keeps the ic precise. If a future
141 : syscall needs this, do "ic = vm->ic" below.
142 :
143 : - We do not let the syscall increase cu as nothing requires
144 : this and it guarantees the interpreter will halt in a
145 : reasonable finite amount of time. If a future syscall
146 : needs this, do "cu = vm->cu" below.
147 :
148 : - A syscall that returns SIGCOST is always treated as though
149 : it also zerod cu.
150 :
151 : At this point, vm->cu is whatever the syscall tried to set
152 : and cu is positive.
153 :
154 : Exit
155 : At this point, cu is positive and err is clear.
156 : */
157 :
158 0 : # if FD_HAS_FLATCC
159 0 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP \
160 : /* Dumping for debugging purposes */ \
161 12 : if( FD_UNLIKELY( vm->dump_syscall_to_pb ) ) { \
162 0 : fd_dump_vm_syscall_to_protobuf( vm, syscall->name ); \
163 0 : }
164 : # else
165 : # define FD_VM_INTERP_SYSCALL_EXEC_DUMP
166 : # endif
167 0 : # define FD_VM_INTERP_SYSCALL_EXEC \
168 : /* Setup */ \
169 12 : vm->pc = pc; \
170 12 : vm->ic = ic; \
171 12 : vm->cu = cu; \
172 12 : vm->frame_cnt = frame_cnt; \
173 12 : FD_VM_INTERP_SYSCALL_EXEC_DUMP \
174 : /* Execution */ \
175 12 : ulong ret[1]; \
176 12 : err = syscall->func( vm, reg[1], reg[2], reg[3], reg[4], reg[5], ret ); \
177 12 : reg[0] = ret[0]; \
178 : /* Error handling */ \
179 12 : ulong cu_req = vm->cu; \
180 12 : cu = fd_ulong_min( cu_req, cu ); \
181 12 : if( FD_UNLIKELY( err ) ) { \
182 0 : if( err==FD_VM_SYSCALL_ERR_COMPUTE_BUDGET_EXCEEDED ) cu = 0UL; /* cmov */ \
183 0 : FD_VM_TEST_ERR_EXISTS( vm ); \
184 0 : goto sigsyscall; \
185 0 : } \
186 : /* Exit */
187 :
188 :
189 : /* FD_VM_INTERP_INSTR_BEGIN / FD_VM_INTERP_INSTR_END bracket opcode's
190 : implementation for an opcode that does not branch. On entry, the
191 : instruction word has been unpacked into dst / src / offset / imm
192 : and reg[dst] / reg[src] has been prefetched into reg_dst / reg_src. */
193 :
194 246390 : # define FD_VM_INTERP_INSTR_BEGIN(opcode) interp_##opcode:
195 :
196 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~0.3% faster in some benchmarks, slower in others but more code footprint */
197 246018 : # define FD_VM_INTERP_INSTR_END pc++; FD_VM_INTERP_INSTR_EXEC
198 : # else /* Use this version when tracing or optimizing code footprint */
199 0 : # define FD_VM_INTERP_INSTR_END pc++; goto interp_exec
200 : # endif
201 :
202 : /* Instead of doing a lot of compute budget calcs and tests every
203 : instruction, we note that the program counter increases
204 : monotonically after a branch (or a program start) until the next
205 : branch (or program termination). We save the program counter of
206 : the start of such a segment in pc0. Whenever we encounter a branch
207 : (or a program termination) at pc, we know we processed pc-pc0+1
208 : text words (including the text word for the branch instruction
209 : itself as all branch instructions are single word).
210 :
211 : Each instruction costs 1 cu (syscalls can cost extra on top of
212 : this that is accounted separately in CALL_IMM below). Since there
213 : could have been multiword instructions in this segment, at start of
214 : such a segment, we zero out the accumulator ic_correction and have
215 : every multiword instruction in the segment accumulate the number of
216 : extra text words it has to this variable. (Sigh ... it would be a
217 : lot simpler to bill based on text words processed but this would be
218 : very difficult to make this protocol change at this point.)
219 :
220 : When we encounter a branch at pc, the number of instructions
221 : processed (and thus the number of compute units to bill for that
222 : segment) is thus:
223 :
224 : pc - pc0 + 1 - ic_correction
225 :
226 : IMPORTANT SAFETY TIP! This implies the worst case interval before
227 : checking the cu budget is the worst case text_cnt. But since all
228 : such instructions are cheap 1 cu instructions and processed fast
229 : and text max is limited in size, this should be acceptable in
230 : practice. FIXME: DOUBLE CHECK THE MATH ABOVE AGAINST PROTOCOL
231 : LIMITS. */
232 :
233 0 : ulong pc0 = pc;
234 0 : ulong ic_correction = 0UL;
235 :
236 0 : # define FD_VM_INTERP_BRANCH_BEGIN(opcode) \
237 149154 : interp_##opcode: \
238 : /* Bill linear text segment and this branch instruction as per the above */ \
239 149154 : ic_correction = pc - pc0 + 1UL - ic_correction; \
240 149154 : ic += ic_correction; \
241 149154 : if( FD_UNLIKELY( ic_correction>cu ) ) goto sigcost; /* Note: untaken branches don't consume BTB */ \
242 149154 : cu -= ic_correction; \
243 : /* At this point, cu>=0 */ \
244 148353 : ic_correction = 0UL;
245 :
246 : /* FIXME: debatable if it is better to do pc++ here or have the
247 : instruction implementations do it in their code path. */
248 :
249 : # ifndef FD_VM_INTERP_EXE_TRACING_ENABLED /* Non-tracing path only, ~4% faster in some benchmarks, slower in others but more code footprint */
250 : # define FD_VM_INTERP_BRANCH_END \
251 141960 : pc++; \
252 141960 : pc0 = pc; /* Start a new linear segment */ \
253 141990 : FD_VM_INTERP_INSTR_EXEC
254 : # else /* Use this version when tracing or optimizing code footprint */
255 : # define FD_VM_INTERP_BRANCH_END \
256 0 : pc++; \
257 0 : pc0 = pc; /* Start a new linear segment */ \
258 : /* FIXME: TEST sigsplit HERE */ \
259 0 : goto interp_exec
260 : # endif
261 :
262 : /* FD_VM_INTERP_STACK_PUSH pushes reg[6:9] onto the shadow stack and
263 : advances reg[10] to a new user stack frame. If there are no more
264 : stack frames available, will do a SIGSTACK. */
265 :
266 : /* FIXME: double check faulting is desired on stack overflow. */
267 :
268 : /* FIXME: a pre-belt-sanding FIXME implied the TLB should be updated
269 : to prevent byte code from accessing the stack outside its current
270 : stack frame. But this would break the common practice of a
271 : function passing a pointer to something on its stack into a
272 : function that it calls:
273 :
274 : void foo( ... ) {
275 : ...
276 : int ret;
277 : bar( &ret );
278 : ...
279 : }
280 :
281 : So this probably shouldn't be done. But, if it is in fact
282 : necessary, the TLB updates would be here and in pop. */
283 :
284 : /* FIXME: unvalidated code mucking with r10 */
285 :
286 0 : # define FD_VM_INTERP_STACK_PUSH \
287 255 : shadow[ frame_cnt ].r6 = reg[6]; \
288 255 : shadow[ frame_cnt ].r7 = reg[7]; \
289 255 : shadow[ frame_cnt ].r8 = reg[8]; \
290 255 : shadow[ frame_cnt ].r9 = reg[9]; \
291 255 : shadow[ frame_cnt ].r10 = reg[10]; \
292 255 : shadow[ frame_cnt ].pc = pc; \
293 255 : if( FD_UNLIKELY( ++frame_cnt>=frame_max ) ) goto sigstack; /* Note: untaken branches don't consume BTB */ \
294 255 : reg[10] += vm->stack_frame_sz * vm->stack_push_frame_count; \
295 : /* We subtract the heap cost in the BPF loader */
296 :
297 0 : goto interp_exec; /* Silly but to avoid unused label warning in some configurations */
298 8847 : interp_exec:
299 :
300 : # ifdef FD_VM_INTERP_EXE_TRACING_ENABLED
301 : /* Note: when tracing or optimizing for code footprint, all
302 : instruction execution starts here such that this is only point
303 : where exe tracing diagnostics are needed. */
304 0 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigtext;
305 0 : fd_vm_trace_event_exe( vm->trace, pc, ic + ( pc - pc0 - ic_correction ), cu, reg, vm->text + pc, vm->text_cnt - pc, ic_correction, frame_cnt );
306 0 : # endif
307 :
308 8847 : FD_VM_INTERP_INSTR_EXEC;
309 :
310 : /* 0x00 - 0x0f ******************************************************/
311 :
312 8847 : FD_VM_INTERP_INSTR_BEGIN(0x04) /* FD_SBPF_OP_ADD_IMM */
313 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)imm );
314 36 : FD_VM_INTERP_INSTR_END;
315 :
316 45 : FD_VM_INTERP_INSTR_BEGIN(0x04depr) /* FD_SBPF_OP_ADD_IMM deprecated SIMD-0174 */
317 45 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)imm );
318 45 : FD_VM_INTERP_INSTR_END;
319 :
320 642 : FD_VM_INTERP_BRANCH_BEGIN(0x05) /* FD_SBPF_OP_JA */
321 636 : pc += offset;
322 636 : FD_VM_INTERP_BRANCH_END;
323 :
324 30108 : FD_VM_INTERP_INSTR_BEGIN(0x07) /* FD_SBPF_OP_ADD64_IMM */
325 30108 : reg[ dst ] = reg_dst + (ulong)(long)(int)imm;
326 30108 : FD_VM_INTERP_INSTR_END;
327 :
328 33 : FD_VM_INTERP_INSTR_BEGIN(0x0c) /* FD_SBPF_OP_ADD_REG */
329 33 : reg[ dst ] = (ulong)(uint)( (int)reg_dst + (int)reg_src );
330 33 : FD_VM_INTERP_INSTR_END;
331 :
332 39 : FD_VM_INTERP_INSTR_BEGIN(0x0cdepr) /* FD_SBPF_OP_ADD_REG deprecated SIMD-0174 */
333 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst + (int)reg_src );
334 39 : FD_VM_INTERP_INSTR_END;
335 :
336 78 : FD_VM_INTERP_INSTR_BEGIN(0x0f) /* FD_SBPF_OP_ADD64_REG */
337 78 : reg[ dst ] = reg_dst + reg_src;
338 78 : FD_VM_INTERP_INSTR_END;
339 :
340 : /* 0x10 - 0x1f ******************************************************/
341 :
342 36 : FD_VM_INTERP_INSTR_BEGIN(0x14) /* FD_SBPF_OP_SUB_IMM */
343 36 : reg[ dst ] = (ulong)(uint)( (int)imm - (int)reg_dst );
344 36 : FD_VM_INTERP_INSTR_END;
345 :
346 39 : FD_VM_INTERP_INSTR_BEGIN(0x14depr) /* FD_SBPF_OP_SUB_IMM deprecated SIMD-0174 */
347 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)imm );
348 39 : FD_VM_INTERP_INSTR_END;
349 :
350 1254 : FD_VM_INTERP_BRANCH_BEGIN(0x15) /* FD_SBPF_OP_JEQ_IMM */
351 1242 : pc += fd_ulong_if( reg_dst==(ulong)(long)(int)imm, offset, 0UL );
352 1242 : FD_VM_INTERP_BRANCH_END;
353 :
354 33 : FD_VM_INTERP_INSTR_BEGIN(0x17) /* FD_SBPF_OP_SUB64_IMM */
355 33 : reg[ dst ] = (ulong)(long)(int)imm - reg_dst;
356 33 : FD_VM_INTERP_INSTR_END;
357 :
358 36 : FD_VM_INTERP_INSTR_BEGIN(0x17depr) /* FD_SBPF_OP_SUB64_IMM deprecated SIMD-0174 */
359 36 : reg[ dst ] = reg_dst - (ulong)(long)(int)imm;
360 36 : FD_VM_INTERP_INSTR_END;
361 :
362 144 : FD_VM_INTERP_INSTR_BEGIN(0x18) /* FD_SBPF_OP_LDQ */
363 144 : pc++;
364 144 : ic_correction++;
365 : /* No need to check pc because it's already checked during validation.
366 : if( FD_UNLIKELY( pc>=text_cnt ) ) goto sigsplit; // Note: untaken branches don't consume BTB */
367 144 : reg[ dst ] = (ulong)((ulong)imm | ((ulong)fd_vm_instr_imm( text[ pc ] ) << 32));
368 144 : FD_VM_INTERP_INSTR_END;
369 :
370 36 : FD_VM_INTERP_INSTR_BEGIN(0x1c) /* FD_SBPF_OP_SUB_REG */
371 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst - (int)reg_src );
372 36 : FD_VM_INTERP_INSTR_END;
373 :
374 39 : FD_VM_INTERP_INSTR_BEGIN(0x1cdepr) /* FD_SBPF_OP_SUB_REG deprecated SIMD-0174 */
375 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst - (int)reg_src );
376 39 : FD_VM_INTERP_INSTR_END;
377 :
378 648 : FD_VM_INTERP_BRANCH_BEGIN(0x1d) /* FD_SBPF_OP_JEQ_REG */
379 642 : pc += fd_ulong_if( reg_dst==reg_src, offset, 0UL );
380 642 : FD_VM_INTERP_BRANCH_END;
381 :
382 30093 : FD_VM_INTERP_INSTR_BEGIN(0x1f) /* FD_SBPF_OP_SUB64_REG */
383 30093 : reg[ dst ] = reg_dst - reg_src;
384 30093 : FD_VM_INTERP_INSTR_END;
385 :
386 : /* 0x20 - 0x2f ******************************************************/
387 :
388 42 : FD_VM_INTERP_INSTR_BEGIN(0x24) /* FD_SBPF_OP_MUL_IMM */
389 42 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)imm );
390 42 : FD_VM_INTERP_INSTR_END;
391 :
392 3126 : FD_VM_INTERP_BRANCH_BEGIN(0x25) /* FD_SBPF_OP_JGT_IMM */
393 3096 : pc += fd_ulong_if( reg_dst>(ulong)(long)(int)imm, offset, 0UL );
394 3096 : FD_VM_INTERP_BRANCH_END;
395 :
396 9 : FD_VM_INTERP_INSTR_BEGIN(0x27) { /* FD_SBPF_OP_STB */
397 9 : ulong vaddr = reg_dst + offset;
398 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
399 9 : if( FD_UNLIKELY( !haddr ) ) {
400 6 : vm->segv_vaddr = vaddr;
401 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
402 6 : vm->segv_access_len = 1UL;
403 6 : goto sigsegv;
404 6 : } /* Note: untaken branches don't consume BTB */
405 3 : fd_vm_mem_st_1( haddr, (uchar)imm );
406 3 : }
407 3 : FD_VM_INTERP_INSTR_END;
408 :
409 78 : FD_VM_INTERP_INSTR_BEGIN(0x2c) { /* FD_SBPF_OP_LDXB */
410 78 : ulong vaddr = reg_src + offset;
411 78 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_ld_sz, 0, 0UL );
412 78 : if( FD_UNLIKELY( !haddr ) ) {
413 24 : vm->segv_vaddr = vaddr;
414 24 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
415 24 : vm->segv_access_len = 1UL;
416 24 : goto sigsegv;
417 24 : } /* Note: untaken branches don't consume BTB */
418 54 : reg[ dst ] = fd_vm_mem_ld_1( haddr );
419 54 : }
420 54 : FD_VM_INTERP_INSTR_END;
421 :
422 3117 : FD_VM_INTERP_BRANCH_BEGIN(0x2d) /* FD_SBPF_OP_JGT_REG */
423 3087 : pc += fd_ulong_if( reg_dst>reg_src, offset, 0UL );
424 3087 : FD_VM_INTERP_BRANCH_END;
425 :
426 9 : FD_VM_INTERP_INSTR_BEGIN(0x2f) { /* FD_SBPF_OP_STXB */
427 9 : ulong vaddr = reg_dst + offset;
428 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uchar), region_haddr, region_st_sz, 1, 0UL );
429 9 : if( FD_UNLIKELY( !haddr ) ) {
430 6 : vm->segv_vaddr = vaddr;
431 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
432 6 : vm->segv_access_len = 1UL;
433 6 : goto sigsegv;
434 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigrdonly */
435 3 : fd_vm_mem_st_1( haddr, (uchar)reg_src );
436 3 : }
437 3 : FD_VM_INTERP_INSTR_END;
438 :
439 42 : FD_VM_INTERP_INSTR_BEGIN(0x27depr) /* FD_SBPF_OP_MUL64_IMM */
440 42 : reg[ dst ] = (ulong)( (long)reg_dst * (long)(int)imm );
441 42 : FD_VM_INTERP_INSTR_END;
442 :
443 39 : FD_VM_INTERP_INSTR_BEGIN(0x2cdepr) /* FD_SBPF_OP_MUL_REG */
444 39 : reg[ dst ] = (ulong)(long)( (int)reg_dst * (int)reg_src );
445 39 : FD_VM_INTERP_INSTR_END;
446 :
447 30078 : FD_VM_INTERP_INSTR_BEGIN(0x2fdepr) /* FD_SBPF_OP_MUL64_REG */
448 30078 : reg[ dst ] = reg_dst * reg_src;
449 30078 : FD_VM_INTERP_INSTR_END;
450 :
451 : /* 0x30 - 0x3f ******************************************************/
452 :
453 42 : FD_VM_INTERP_INSTR_BEGIN(0x34) /* FD_SBPF_OP_DIV_IMM */
454 42 : /* FIXME: convert to a multiply at validation time (usually probably
455 42 : not worth it) */
456 42 : reg[ dst ] = (ulong)((uint)reg_dst / imm);
457 42 : FD_VM_INTERP_INSTR_END;
458 :
459 6123 : FD_VM_INTERP_BRANCH_BEGIN(0x35) /* FD_SBPF_OP_JGE_IMM */
460 6063 : pc += fd_ulong_if( reg_dst>=(ulong)(long)(int)imm, offset, 0UL );
461 6063 : FD_VM_INTERP_BRANCH_END;
462 :
463 3 : FD_VM_INTERP_INSTR_BEGIN(0x36) /* FD_SBPF_OP_UHMUL64_IMM */
464 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)(ulong)imm ) >> 64 );
465 3 : FD_VM_INTERP_INSTR_END;
466 :
467 9 : FD_VM_INTERP_INSTR_BEGIN(0x37) { /* FD_SBPF_OP_STH */
468 9 : ulong vaddr = reg_dst + offset;
469 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
470 9 : int sigsegv = !haddr;
471 9 : if( FD_UNLIKELY( sigsegv ) ) {
472 6 : vm->segv_vaddr = vaddr;
473 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
474 6 : vm->segv_access_len = 2UL;
475 6 : goto sigsegv;
476 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
477 3 : fd_vm_mem_st_2( haddr, (ushort)imm );
478 3 : }
479 3 : FD_VM_INTERP_INSTR_END;
480 :
481 96 : FD_VM_INTERP_INSTR_BEGIN(0x3c) { /* FD_SBPF_OP_LDXH */
482 96 : ulong vaddr = reg_src + offset;
483 96 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_ld_sz, 0, 0UL );
484 96 : int sigsegv = !haddr;
485 96 : if( FD_UNLIKELY( sigsegv ) ) {
486 36 : vm->segv_vaddr = vaddr;
487 36 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
488 36 : vm->segv_access_len = 2UL;
489 36 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
490 36 : }
491 60 : reg[ dst ] = fd_vm_mem_ld_2( haddr );
492 60 : }
493 60 : FD_VM_INTERP_INSTR_END;
494 :
495 35532 : FD_VM_INTERP_BRANCH_BEGIN(0x3d) /* FD_SBPF_OP_JGE_REG */
496 35478 : pc += fd_ulong_if( reg_dst>=reg_src, offset, 0UL );
497 35478 : FD_VM_INTERP_BRANCH_END;
498 :
499 9 : FD_VM_INTERP_INSTR_BEGIN(0x3f) { /* FD_SBPF_OP_STXH */
500 9 : ulong vaddr = reg_dst + offset;
501 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ushort), region_haddr, region_st_sz, 1, 0UL );
502 9 : int sigsegv = !haddr;
503 9 : if( FD_UNLIKELY( sigsegv ) ) {
504 6 : vm->segv_vaddr = vaddr;
505 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
506 6 : vm->segv_access_len = 2UL;
507 6 : goto sigsegv;
508 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
509 3 : fd_vm_mem_st_2( haddr, (ushort)reg_src );
510 3 : }
511 3 : FD_VM_INTERP_INSTR_END;
512 :
513 3 : FD_VM_INTERP_INSTR_BEGIN(0x3e) /* FD_SBPF_OP_UHMUL64_REG */
514 3 : reg[ dst ] = (ulong)(( (uint128)reg_dst * (uint128)reg_src ) >> 64 );
515 3 : FD_VM_INTERP_INSTR_END;
516 :
517 45 : FD_VM_INTERP_INSTR_BEGIN(0x37depr) /* FD_SBPF_OP_DIV64_IMM */
518 45 : reg[ dst ] = reg_dst / (ulong)(long)(int)imm;
519 45 : FD_VM_INTERP_INSTR_END;
520 :
521 57 : FD_VM_INTERP_INSTR_BEGIN(0x3cdepr) /* FD_SBPF_OP_DIV_REG */
522 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
523 42 : reg[ dst ] = (ulong)((uint)reg_dst / (uint)reg_src);
524 42 : FD_VM_INTERP_INSTR_END;
525 :
526 30072 : FD_VM_INTERP_INSTR_BEGIN(0x3fdepr) /* FD_SBPF_OP_DIV64_REG */
527 30072 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
528 30060 : reg[ dst ] = reg_dst / reg_src;
529 30060 : FD_VM_INTERP_INSTR_END;
530 :
531 : /* 0x40 - 0x4f ******************************************************/
532 :
533 51 : FD_VM_INTERP_INSTR_BEGIN(0x44) /* FD_SBPF_OP_OR_IMM */
534 51 : reg[ dst ] = (ulong)( (uint)reg_dst | imm );
535 51 : FD_VM_INTERP_INSTR_END;
536 :
537 1266 : FD_VM_INTERP_BRANCH_BEGIN(0x45) /* FD_SBPF_OP_JSET_IMM */
538 1254 : pc += fd_ulong_if( !!(reg_dst & (ulong)(long)(int)imm), offset, 0UL );
539 1254 : FD_VM_INTERP_BRANCH_END;
540 :
541 39 : FD_VM_INTERP_INSTR_BEGIN(0x46) /* FD_SBPF_OP_UDIV32_IMM */
542 39 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)imm );
543 39 : FD_VM_INTERP_INSTR_END;
544 :
545 51 : FD_VM_INTERP_INSTR_BEGIN(0x47) /* FD_SBPF_OP_OR64_IMM */
546 51 : reg[ dst ] = reg_dst | (ulong)(long)(int)imm;
547 51 : FD_VM_INTERP_INSTR_END;
548 :
549 57 : FD_VM_INTERP_INSTR_BEGIN(0x4c) /* FD_SBPF_OP_OR_REG */
550 57 : reg[ dst ] = (ulong)(uint)( reg_dst | reg_src );
551 57 : FD_VM_INTERP_INSTR_END;
552 :
553 663 : FD_VM_INTERP_BRANCH_BEGIN(0x4d) /* FD_SBPF_OP_JSET_REG */
554 657 : pc += fd_ulong_if( !!(reg_dst & reg_src), offset, 0UL );
555 657 : FD_VM_INTERP_BRANCH_END;
556 :
557 48 : FD_VM_INTERP_INSTR_BEGIN(0x4e) /* FD_SBPF_OP_UDIV32_REG */
558 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
559 36 : reg[ dst ] = (ulong)( (uint)reg_dst / (uint)reg_src );
560 36 : FD_VM_INTERP_INSTR_END;
561 :
562 57 : FD_VM_INTERP_INSTR_BEGIN(0x4f) /* FD_SBPF_OP_OR64_REG */
563 57 : reg[ dst ] = reg_dst | reg_src;
564 57 : FD_VM_INTERP_INSTR_END;
565 :
566 : /* 0x50 - 0x5f ******************************************************/
567 :
568 54 : FD_VM_INTERP_INSTR_BEGIN(0x54) /* FD_SBPF_OP_AND_IMM */
569 54 : reg[ dst ] = (ulong)( (uint)reg_dst & imm );
570 54 : FD_VM_INTERP_INSTR_END;
571 :
572 30669 : FD_VM_INTERP_BRANCH_BEGIN(0x55) /* FD_SBPF_OP_JNE_IMM */
573 30663 : pc += fd_ulong_if( reg_dst!=(ulong)(long)(int)imm, offset, 0UL );
574 30663 : FD_VM_INTERP_BRANCH_END;
575 :
576 39 : FD_VM_INTERP_INSTR_BEGIN(0x56) /* FD_SBPF_OP_UDIV64_IMM */
577 39 : reg[ dst ] = reg_dst / (ulong)imm;
578 39 : FD_VM_INTERP_INSTR_END;
579 :
580 63 : FD_VM_INTERP_INSTR_BEGIN(0x57) /* FD_SBPF_OP_AND64_IMM */
581 63 : reg[ dst ] = reg_dst & (ulong)(long)(int)imm;
582 63 : FD_VM_INTERP_INSTR_END;
583 :
584 60 : FD_VM_INTERP_INSTR_BEGIN(0x5c) /* FD_SBPF_OP_AND_REG */
585 60 : reg[ dst ] = (ulong)(uint)( reg_dst & reg_src );
586 60 : FD_VM_INTERP_INSTR_END;
587 :
588 657 : FD_VM_INTERP_BRANCH_BEGIN(0x5d) /* FD_SBPF_OP_JNE_REG */
589 651 : pc += fd_ulong_if( reg_dst!=reg_src, offset, 0UL );
590 651 : FD_VM_INTERP_BRANCH_END;
591 :
592 45 : FD_VM_INTERP_INSTR_BEGIN(0x5e) /* FD_SBPF_OP_UDIV64_REG */
593 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
594 36 : reg[ dst ] = reg_dst / reg_src;
595 36 : FD_VM_INTERP_INSTR_END;
596 :
597 48 : FD_VM_INTERP_INSTR_BEGIN(0x5f) /* FD_SBPF_OP_AND64_REG */
598 48 : reg[ dst ] = reg_dst & reg_src;
599 48 : FD_VM_INTERP_INSTR_END;
600 :
601 : /* 0x60 - 0x6f ******************************************************/
602 :
603 : /* FIXME: CHECK THE CU COST MODEL FOR THESE (IS IT LIKE
604 : FD_VM_CONSUME_MEM AND NOT JUST FIXED) */
605 : /* FIXME: MEM TRACING DIAGNOSTICS GO IN HERE */
606 :
607 453 : FD_VM_INTERP_INSTR_BEGIN(0x64) /* FD_SBPF_OP_LSH_IMM */
608 453 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L291 */
609 453 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, (uint)imm ) );
610 453 : FD_VM_INTERP_INSTR_END;
611 :
612 3702 : FD_VM_INTERP_BRANCH_BEGIN(0x65) /* FD_SBPF_OP_JSGT_IMM */
613 3666 : pc += fd_ulong_if( (long)reg_dst>(long)(int)imm, offset, 0UL );
614 3666 : FD_VM_INTERP_BRANCH_END;
615 :
616 39 : FD_VM_INTERP_INSTR_BEGIN(0x66) /* FD_SBPF_OP_UREM32_IMM */
617 39 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)imm );
618 39 : FD_VM_INTERP_INSTR_END;
619 :
620 456 : FD_VM_INTERP_INSTR_BEGIN(0x67) /* FD_SBPF_OP_LSH64_IMM */
621 456 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L376 */
622 456 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, imm );
623 456 : FD_VM_INTERP_INSTR_END;
624 :
625 447 : FD_VM_INTERP_INSTR_BEGIN(0x6c) /* FD_SBPF_OP_LSH_REG */
626 447 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L292 */
627 447 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHL( (uint)reg_dst, reg_src ) );
628 447 : FD_VM_INTERP_INSTR_END;
629 :
630 3108 : FD_VM_INTERP_BRANCH_BEGIN(0x6d) /* FD_SBPF_OP_JSGT_REG */
631 3078 : pc += fd_ulong_if( (long)reg_dst>(long)reg_src, offset, 0UL );
632 3078 : FD_VM_INTERP_BRANCH_END;
633 :
634 48 : FD_VM_INTERP_INSTR_BEGIN(0x6e) /* FD_SBPF_OP_UREM32_REG */
635 48 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
636 36 : reg[ dst ] = (ulong)( (uint)reg_dst % (uint)reg_src );
637 36 : FD_VM_INTERP_INSTR_END;
638 :
639 9 : FD_VM_INTERP_INSTR_BEGIN(0x6f) /* FD_SBPF_OP_LSH64_REG */
640 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L377 */
641 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHL( reg_dst, reg_src );
642 9 : FD_VM_INTERP_INSTR_END;
643 :
644 : /* 0x70 - 0x7f ******************************************************/
645 :
646 9 : FD_VM_INTERP_INSTR_BEGIN(0x74) /* FD_SBPF_OP_RSH_IMM */
647 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L293 */
648 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, imm ) );
649 9 : FD_VM_INTERP_INSTR_END;
650 :
651 6714 : FD_VM_INTERP_BRANCH_BEGIN(0x75) /* FD_SBPF_OP_JSGE_IMM */
652 6648 : pc += fd_ulong_if( (long)reg_dst>=(long)(int)imm, offset, 0UL );
653 6648 : FD_VM_INTERP_BRANCH_END;
654 :
655 39 : FD_VM_INTERP_INSTR_BEGIN(0x76) /* FD_SBPF_OP_UREM64_IMM */
656 39 : reg[ dst ] = reg_dst % (ulong)imm;
657 39 : FD_VM_INTERP_INSTR_END;
658 :
659 12 : FD_VM_INTERP_INSTR_BEGIN(0x77) /* FD_SBPF_OP_RSH64_IMM */
660 12 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L378 */
661 12 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, imm );
662 12 : FD_VM_INTERP_INSTR_END;
663 :
664 9 : FD_VM_INTERP_INSTR_BEGIN(0x7c) /* FD_SBPF_OP_RSH_REG */
665 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L294 */
666 9 : reg[ dst ] = (ulong)( FD_RUST_UINT_WRAPPING_SHR( (uint)reg_dst, (uint)reg_src ) );
667 9 : FD_VM_INTERP_INSTR_END;
668 :
669 5508 : FD_VM_INTERP_BRANCH_BEGIN(0x7d) /* FD_SBPF_OP_JSGE_REG */
670 5454 : pc += fd_ulong_if( (long)reg_dst>=(long)reg_src, offset, 0UL );
671 5454 : FD_VM_INTERP_BRANCH_END;
672 :
673 45 : FD_VM_INTERP_INSTR_BEGIN(0x7e) /* FD_SBPF_OP_UREM64_REG */
674 45 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
675 36 : reg[ dst ] = reg_dst % reg_src;
676 36 : FD_VM_INTERP_INSTR_END;
677 :
678 9 : FD_VM_INTERP_INSTR_BEGIN(0x7f) /* FD_SBPF_OP_RSH64_REG */
679 9 : /* https://github.com/solana-labs/rbpf/blob/8d36530b7071060e2837ebb26f25590db6816048/src/interpreter.rs#L379 */
680 9 : reg[ dst ] = FD_RUST_ULONG_WRAPPING_SHR( reg_dst, reg_src );
681 9 : FD_VM_INTERP_INSTR_END;
682 :
683 : /* 0x80-0x8f ********************************************************/
684 :
685 3 : FD_VM_INTERP_INSTR_BEGIN(0x84) /* FD_SBPF_OP_NEG */
686 3 : reg[ dst ] = (ulong)( -(uint)reg_dst );
687 3 : FD_VM_INTERP_INSTR_END;
688 :
689 9 : FD_VM_INTERP_BRANCH_BEGIN(0x85) { /* FD_SBPF_OP_CALL_IMM */
690 :
691 9 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
692 9 : if( FD_UNLIKELY( !syscall ) ) { /* Optimize for the syscall case */
693 :
694 : /* Note we do the stack push before updating the pc(*). This implies
695 : that the call stack frame gets allocated _before_ checking if the
696 : call target is valid. It would be fine to switch the order
697 : though such would change the precise faulting semantics of
698 : sigtextbr and sigstack.
699 :
700 : (*)but after checking calldests, see point below. */
701 :
702 : /* Agave's order of checks
703 : (https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L565-L572):
704 : 1. Lookup imm hash in FunctionRegistry (calldests_test is our equivalent)
705 : 2. Push stack frame
706 : 3. Check PC
707 : 4. Update PC
708 :
709 : Following this precisely is impossible as our PC check also
710 : serves as a bounds check for the calldests_test call. So we
711 : have to perform step 3 before step 1. The following
712 : is a best-effort implementation that should match the VM state
713 : in all ways except error code. */
714 :
715 : /* Special case to handle entrypoint.
716 : ebpf::hash_symbol_name(b"entrypoint") = 0xb00c380, and
717 : fd_pchash_inverse( 0xb00c380U ) = 0x71e3cf81U */
718 6 : if( FD_UNLIKELY( imm==0x71e3cf81U ) ) {
719 0 : FD_VM_INTERP_STACK_PUSH;
720 0 : pc = entry_pc - 1;
721 6 : } else {
722 6 : ulong target_pc = (ulong)fd_pchash_inverse( imm );
723 6 : if( FD_UNLIKELY( target_pc>=text_cnt ) ) {
724 6 : goto sigillbr; /* different return between 0x85 and 0x8d */
725 6 : }
726 0 : if( FD_UNLIKELY( !fd_sbpf_calldests_test( calldests, target_pc ) ) ) {
727 0 : goto sigillbr;
728 0 : }
729 0 : FD_VM_INTERP_STACK_PUSH;
730 0 : pc = target_pc - 1;
731 0 : }
732 :
733 6 : } else {
734 :
735 3 : FD_VM_INTERP_SYSCALL_EXEC;
736 :
737 3 : }
738 9 : } FD_VM_INTERP_BRANCH_END;
739 :
740 : /* SIMD-0178: Static syscalls (SBPF V3+)
741 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L542-L577 */
742 240 : FD_VM_INTERP_BRANCH_BEGIN(0x85_static) { /* FD_SBPF_OP_CALL_IMM (static syscalls) */
743 :
744 240 : if( src == 0 ) {
745 : /* External syscall
746 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L545-L553 */
747 15 : fd_sbpf_syscalls_t const * syscall = imm!=fd_sbpf_syscalls_key_null() ? fd_sbpf_syscalls_query_const( syscalls, (ulong)imm, NULL ) : NULL;
748 15 : if( FD_UNLIKELY( !syscall ) ) goto sigillbr;
749 18 : FD_VM_INTERP_SYSCALL_EXEC;
750 225 : } else if( src == 1 ) {
751 : /* Internal call
752 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L555-L563
753 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/program.rs#L97-L103 */
754 219 : long target_pc_l = fd_long_sat_add( (long)pc, fd_long_sat_add( (long)(int)imm, 1L ) );
755 219 : if( FD_UNLIKELY( target_pc_l<0L || (ulong)target_pc_l>=text_cnt ) ) goto sigillbr;
756 417 : FD_VM_INTERP_STACK_PUSH;
757 417 : pc = (ulong)target_pc_l - 1;
758 417 : } else {
759 : /* https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L574-L576 */
760 6 : goto sigillbr;
761 6 : }
762 :
763 240 : } FD_VM_INTERP_BRANCH_END;
764 :
765 39 : FD_VM_INTERP_INSTR_BEGIN(0x86) /* FD_SBPF_OP_LMUL32_IMM */
766 39 : reg[ dst ] = (ulong)( (uint)reg_dst * imm );
767 39 : FD_VM_INTERP_INSTR_END;
768 :
769 9 : FD_VM_INTERP_INSTR_BEGIN(0x87) { /* FD_SBPF_OP_STW */
770 9 : ulong vaddr = reg_dst + offset;
771 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
772 9 : int sigsegv = !haddr;
773 9 : if( FD_UNLIKELY( sigsegv ) ) {
774 6 : vm->segv_vaddr = vaddr;
775 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
776 6 : vm->segv_access_len = 4UL;
777 6 : goto sigsegv;
778 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
779 3 : fd_vm_mem_st_4( haddr, imm );
780 3 : } FD_VM_INTERP_INSTR_END;
781 :
782 3 : FD_VM_INTERP_INSTR_BEGIN(0x87depr) /* FD_SBPF_OP_NEG64 deprecated */
783 3 : reg[ dst ] = -reg_dst;
784 3 : FD_VM_INTERP_INSTR_END;
785 :
786 108 : FD_VM_INTERP_INSTR_BEGIN(0x8c) { /* FD_SBPF_OP_LDXW */
787 108 : ulong vaddr = reg_src + offset;
788 108 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_ld_sz, 0, 0UL );
789 108 : int sigsegv = !haddr;
790 108 : if( FD_UNLIKELY( sigsegv ) ) {
791 48 : vm->segv_vaddr = vaddr;
792 48 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
793 48 : vm->segv_access_len = 4UL;
794 48 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
795 48 : }
796 60 : reg[ dst ] = fd_vm_mem_ld_4( haddr );
797 60 : }
798 60 : FD_VM_INTERP_INSTR_END;
799 :
800 45 : FD_VM_INTERP_BRANCH_BEGIN(0x8d) { /* FD_SBPF_OP_CALL_REG */
801 :
802 45 : FD_VM_INTERP_STACK_PUSH;
803 :
804 : /* https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L528-L540 */
805 45 : ulong vaddr = fd_sbpf_callx_uses_src_reg_enabled( sbpf_version ) ? reg_src
806 45 : : fd_sbpf_callx_uses_dst_reg_enabled( sbpf_version ) ? reg[ dst ]
807 24 : : reg[ imm & 15U ];
808 :
809 : /* Notes: Agave checks region and target_pc before updating the pc.
810 : To match their state, we do the same, even though we could simply
811 : update the pc and let BRANCH_END fail.
812 : Also, Agave doesn't check alignment. */
813 :
814 45 : ulong region = vaddr >> 32;
815 : /* ulong align = vaddr & 7UL; */
816 45 : ulong target_pc = ((vaddr & FD_VM_OFFSET_MASK) - vm->text_off) / 8UL;
817 45 : if( FD_UNLIKELY( (region!=1UL) | (target_pc>=text_cnt) ) ) goto sigtextbr; /* Note: untaken branches don't consume BTB */
818 3 : pc = target_pc - 1;
819 :
820 3 : } FD_VM_INTERP_BRANCH_END;
821 :
822 33 : FD_VM_INTERP_INSTR_BEGIN(0x8e) /* FD_SBPF_OP_LMUL32_REG */
823 33 : reg[ dst ] = (ulong)( (uint)reg_dst * (uint)reg_src );
824 33 : FD_VM_INTERP_INSTR_END;
825 :
826 9 : FD_VM_INTERP_INSTR_BEGIN(0x8f) { /* FD_SBPF_OP_STXW */
827 9 : ulong vaddr = reg_dst + offset;
828 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(uint), region_haddr, region_st_sz, 1, 0UL );
829 9 : int sigsegv = !haddr;
830 9 : if( FD_UNLIKELY( sigsegv ) ) {
831 6 : vm->segv_vaddr = vaddr;
832 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
833 6 : vm->segv_access_len = 4UL;
834 6 : goto sigsegv;
835 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
836 3 : fd_vm_mem_st_4( haddr, (uint)reg_src );
837 3 : }
838 3 : FD_VM_INTERP_INSTR_END;
839 :
840 : /* 0x90 - 0x9f ******************************************************/
841 :
842 42 : FD_VM_INTERP_INSTR_BEGIN(0x94) /* FD_SBPF_OP_MOD_IMM */
843 42 : reg[ dst ] = (ulong)( (uint)reg_dst % imm );
844 42 : FD_VM_INTERP_INSTR_END;
845 :
846 6345 : FD_VM_INTERP_BRANCH_BEGIN(0x95) /* FD_SBPF_OP_EXIT */
847 6342 : /* Agave JIT VM exit implementation analysis below.
848 6342 :
849 6342 : Agave references:
850 6342 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/interpreter.rs#L503-L509
851 6342 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L697-L702 */
852 6342 : if( FD_UNLIKELY( !frame_cnt ) ) goto sigexit; /* Exit program */
853 21 : frame_cnt--;
854 21 : reg[6] = shadow[ frame_cnt ].r6;
855 21 : reg[7] = shadow[ frame_cnt ].r7;
856 21 : reg[8] = shadow[ frame_cnt ].r8;
857 21 : reg[9] = shadow[ frame_cnt ].r9;
858 21 : reg[10] = shadow[ frame_cnt ].r10;
859 21 : pc = shadow[ frame_cnt ].pc;
860 21 : FD_VM_INTERP_BRANCH_END;
861 :
862 39 : FD_VM_INTERP_INSTR_BEGIN(0x96) /* FD_SBPF_OP_LMUL64_IMM */
863 39 : reg[ dst ] = reg_dst * (ulong)(long)(int)imm;
864 39 : FD_VM_INTERP_INSTR_END;
865 :
866 9 : FD_VM_INTERP_INSTR_BEGIN(0x97) { /* FD_SBPF_OP_STQ */
867 9 : ulong vaddr = reg_dst + offset;
868 9 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
869 9 : int sigsegv = !haddr;
870 9 : if( FD_UNLIKELY( sigsegv ) ) {
871 6 : vm->segv_vaddr = vaddr;
872 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
873 6 : vm->segv_access_len = 8UL;
874 6 : goto sigsegv;
875 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
876 3 : fd_vm_mem_st_8( haddr, (ulong)(long)(int)imm );
877 3 : }
878 3 : FD_VM_INTERP_INSTR_END;
879 :
880 84 : FD_VM_INTERP_INSTR_BEGIN(0x9c) { /* FD_SBPF_OP_LDXQ */
881 84 : ulong vaddr = reg_src + offset;
882 84 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_ld_sz, 0, 0UL );
883 84 : int sigsegv = !haddr;
884 84 : if( FD_UNLIKELY( sigsegv ) ) {
885 42 : vm->segv_vaddr = vaddr;
886 42 : vm->segv_access_type = FD_VM_ACCESS_TYPE_LD;
887 42 : vm->segv_access_len = 8UL;
888 42 : goto sigsegv; /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
889 42 : }
890 42 : reg[ dst ] = fd_vm_mem_ld_8( haddr );
891 42 : }
892 42 : FD_VM_INTERP_INSTR_END;
893 :
894 57 : FD_VM_INTERP_INSTR_BEGIN(0x9e) /* FD_SBPF_OP_LMUL64_REG */
895 57 : reg[ dst ] = reg_dst * reg_src;
896 57 : FD_VM_INTERP_INSTR_END;
897 :
898 21 : FD_VM_INTERP_INSTR_BEGIN(0x9f) { /* FD_SBPF_OP_STXQ */
899 21 : ulong vaddr = reg_dst + offset;
900 21 : ulong haddr = fd_vm_mem_haddr( vm, vaddr, sizeof(ulong), region_haddr, region_st_sz, 1, 0UL );
901 21 : int sigsegv = !haddr;
902 21 : if( FD_UNLIKELY( sigsegv ) ) {
903 6 : vm->segv_vaddr = vaddr;
904 6 : vm->segv_access_type = FD_VM_ACCESS_TYPE_ST;
905 6 : vm->segv_access_len = 8UL;
906 6 : goto sigsegv;
907 6 : } /* Note: untaken branches don't consume BTB */ /* FIXME: sigbus */
908 15 : fd_vm_mem_st_8( haddr, reg_src );
909 15 : }
910 15 : FD_VM_INTERP_INSTR_END;
911 :
912 42 : FD_VM_INTERP_INSTR_BEGIN(0x97depr) /* FD_SBPF_OP_MOD64_IMM */
913 42 : reg[ dst ] = reg_dst % (ulong)(long)(int)imm;
914 42 : FD_VM_INTERP_INSTR_END;
915 :
916 57 : FD_VM_INTERP_INSTR_BEGIN(0x9cdepr) /* FD_SBPF_OP_MOD_REG */
917 57 : if( FD_UNLIKELY( !(uint)reg_src ) ) goto sigfpe;
918 42 : reg[ dst ] = (ulong)( ((uint)reg_dst % (uint)reg_src) );
919 42 : FD_VM_INTERP_INSTR_END;
920 :
921 54 : FD_VM_INTERP_INSTR_BEGIN(0x9fdepr) /* FD_SBPF_OP_MOD64_REG */
922 54 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
923 42 : reg[ dst ] = reg_dst % reg_src;
924 42 : FD_VM_INTERP_INSTR_END;
925 :
926 : /* 0xa0 - 0xaf ******************************************************/
927 :
928 9 : FD_VM_INTERP_INSTR_BEGIN(0xa4) /* FD_SBPF_OP_XOR_IMM */
929 9 : reg[ dst ] = (ulong)( (uint)reg_dst ^ imm );
930 9 : FD_VM_INTERP_INSTR_END;
931 :
932 3126 : FD_VM_INTERP_BRANCH_BEGIN(0xa5) /* FD_SBPF_OP_JLT_IMM */
933 3096 : pc += fd_ulong_if( reg_dst<(ulong)(long)(int)imm, offset, 0UL );
934 3096 : FD_VM_INTERP_BRANCH_END;
935 :
936 9 : FD_VM_INTERP_INSTR_BEGIN(0xa7) /* FD_SBPF_OP_XOR64_IMM */
937 9 : reg[ dst ] = reg_dst ^ (ulong)(long)(int)imm;
938 9 : FD_VM_INTERP_INSTR_END;
939 :
940 9 : FD_VM_INTERP_INSTR_BEGIN(0xac) /* FD_SBPF_OP_XOR_REG */
941 9 : reg[ dst ] = (ulong)(uint)( reg_dst ^ reg_src );
942 9 : FD_VM_INTERP_INSTR_END;
943 :
944 2517 : FD_VM_INTERP_BRANCH_BEGIN(0xad) /* FD_SBPF_OP_JLT_REG */
945 2493 : pc += fd_ulong_if( reg_dst<reg_src, offset, 0UL );
946 2493 : FD_VM_INTERP_BRANCH_END;
947 :
948 21 : FD_VM_INTERP_INSTR_BEGIN(0xaf) /* FD_SBPF_OP_XOR64_REG */
949 21 : reg[ dst ] = reg_dst ^ reg_src;
950 21 : FD_VM_INTERP_INSTR_END;
951 :
952 : /* 0xb0 - 0xbf ******************************************************/
953 :
954 330 : FD_VM_INTERP_INSTR_BEGIN(0xb4) /* FD_SBPF_OP_MOV_IMM */
955 330 : reg[ dst ] = (ulong)imm;
956 330 : FD_VM_INTERP_INSTR_END;
957 :
958 6126 : FD_VM_INTERP_BRANCH_BEGIN(0xb5) /* FD_SBPF_OP_JLE_IMM */
959 6066 : pc += fd_ulong_if( reg_dst<=(ulong)(long)(int)imm, offset, 0UL );
960 6066 : FD_VM_INTERP_BRANCH_END;
961 :
962 3 : FD_VM_INTERP_INSTR_BEGIN(0xb6) /* FD_SBPF_OP_SHMUL64_IMM */
963 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)(int)imm ) >> 64 );
964 3 : FD_VM_INTERP_INSTR_END;
965 :
966 60759 : FD_VM_INTERP_INSTR_BEGIN(0xb7) /* FD_SBPF_OP_MOV64_IMM */
967 60759 : reg[ dst ] = (ulong)(long)(int)imm;
968 60759 : FD_VM_INTERP_INSTR_END;
969 :
970 3 : FD_VM_INTERP_INSTR_BEGIN(0xbc) /* FD_SBPF_OP_MOV_REG */
971 3 : reg[ dst ] = (ulong)(long)(int)reg_src;
972 3 : FD_VM_INTERP_INSTR_END;
973 :
974 15 : FD_VM_INTERP_INSTR_BEGIN(0xbcdepr) /* FD_SBPF_OP_MOV_REG deprecated SIMD-1074 */
975 15 : reg[ dst ] = (ulong)(uint)reg_src;
976 15 : FD_VM_INTERP_INSTR_END;
977 :
978 4917 : FD_VM_INTERP_BRANCH_BEGIN(0xbd) /* FD_SBPF_OP_JLE_REG */
979 4869 : pc += fd_ulong_if( reg_dst<=reg_src, offset, 0UL );
980 4869 : FD_VM_INTERP_BRANCH_END;
981 :
982 3 : FD_VM_INTERP_INSTR_BEGIN(0xbe) /* FD_SBPF_OP_SHMUL64_REG */
983 3 : reg[ dst ] = (ulong)(( (int128)(long)reg_dst * (int128)(long)reg_src ) >> 64 );
984 3 : FD_VM_INTERP_INSTR_END;
985 :
986 60039 : FD_VM_INTERP_INSTR_BEGIN(0xbf) /* FD_SBPF_OP_MOV64_REG */
987 60039 : reg[ dst ] = reg_src;
988 60039 : FD_VM_INTERP_INSTR_END;
989 :
990 : /* 0xc0 - 0xcf ******************************************************/
991 :
992 147 : FD_VM_INTERP_INSTR_BEGIN(0xc4) /* FD_SBPF_OP_ARSH_IMM */
993 147 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, imm ) );
994 147 : FD_VM_INTERP_INSTR_END;
995 :
996 3102 : FD_VM_INTERP_BRANCH_BEGIN(0xc5) /* FD_SBPF_OP_JSLT_IMM */ /* FIXME: CHECK IMM SIGN EXTENSION */
997 3072 : pc += fd_ulong_if( (long)reg_dst<(long)(int)imm, offset, 0UL );
998 3072 : FD_VM_INTERP_BRANCH_END;
999 :
1000 45 : FD_VM_INTERP_INSTR_BEGIN(0xc6) /* FD_SBPF_OP_SDIV32_IMM */
1001 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1002 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)imm );
1003 39 : FD_VM_INTERP_INSTR_END;
1004 :
1005 135 : FD_VM_INTERP_INSTR_BEGIN(0xc7) /* FD_SBPF_OP_ARSH64_IMM */
1006 135 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, imm ) );
1007 135 : FD_VM_INTERP_INSTR_END;
1008 :
1009 96 : FD_VM_INTERP_INSTR_BEGIN(0xcc) /* FD_SBPF_OP_ARSH_REG */
1010 96 : reg[ dst ] = (ulong)(uint)( FD_RUST_INT_WRAPPING_SHR( (int)reg_dst, (uint)reg_src ) );
1011 96 : FD_VM_INTERP_INSTR_END;
1012 :
1013 3108 : FD_VM_INTERP_BRANCH_BEGIN(0xcd) /* FD_SBPF_OP_JSLT_REG */
1014 3078 : pc += fd_ulong_if( (long)reg_dst<(long)reg_src, offset, 0UL );
1015 3078 : FD_VM_INTERP_BRANCH_END;
1016 :
1017 54 : FD_VM_INTERP_INSTR_BEGIN(0xce) /* FD_SBPF_OP_SDIV32_REG */
1018 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1019 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1020 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst / (int)reg_src );
1021 36 : FD_VM_INTERP_INSTR_END;
1022 :
1023 93 : FD_VM_INTERP_INSTR_BEGIN(0xcf) /* FD_SBPF_OP_ARSH64_REG */
1024 93 : reg[ dst ] = (ulong)( FD_RUST_LONG_WRAPPING_SHR( (long)reg_dst, reg_src ) );
1025 93 : FD_VM_INTERP_INSTR_END;
1026 :
1027 : /* 0xd0 - 0xdf ******************************************************/
1028 :
1029 21 : FD_VM_INTERP_INSTR_BEGIN(0xd4) /* FD_SBPF_OP_END_LE */
1030 21 : switch( imm ) {
1031 9 : case 16U: reg[ dst ] = (ushort)reg_dst; break;
1032 3 : case 32U: reg[ dst ] = (uint) reg_dst; break;
1033 3 : case 64U: break;
1034 6 : default: goto siginv;
1035 21 : }
1036 15 : FD_VM_INTERP_INSTR_END;
1037 :
1038 2460 : FD_VM_INTERP_BRANCH_BEGIN(0xd5) /* FD_SBPF_OP_JSLE_IMM */
1039 2436 : pc += fd_ulong_if( (long)reg_dst<=(long)(int)imm, offset, 0UL );
1040 2436 : FD_VM_INTERP_BRANCH_END;
1041 :
1042 42 : FD_VM_INTERP_INSTR_BEGIN(0xd6) /* FD_SBPF_OP_SDIV64_IMM */
1043 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1044 39 : reg[ dst ] = (ulong)( (long)reg_dst / (long)(int)imm );
1045 39 : FD_VM_INTERP_INSTR_END;
1046 :
1047 75 : FD_VM_INTERP_INSTR_BEGIN(0xdc) /* FD_SBPF_OP_END_BE */
1048 75 : switch( imm ) {
1049 42 : case 16U: reg[ dst ] = (ulong)fd_ushort_bswap( (ushort)reg_dst ); break;
1050 12 : case 32U: reg[ dst ] = (ulong)fd_uint_bswap ( (uint) reg_dst ); break;
1051 9 : case 64U: reg[ dst ] = fd_ulong_bswap ( (ulong) reg_dst ); break;
1052 12 : default: goto siginv;
1053 75 : }
1054 63 : FD_VM_INTERP_INSTR_END;
1055 :
1056 1854 : FD_VM_INTERP_BRANCH_BEGIN(0xdd) /* FD_SBPF_OP_JSLE_REG */
1057 1836 : pc += fd_ulong_if( (long)reg_dst<=(long)reg_src, offset, 0UL );
1058 1836 : FD_VM_INTERP_BRANCH_END;
1059 :
1060 48 : FD_VM_INTERP_INSTR_BEGIN(0xde) /* FD_SBPF_OP_SDIV64_REG */
1061 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1062 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1063 36 : reg[ dst ] = (ulong)( (long)reg_dst / (long)reg_src );
1064 36 : FD_VM_INTERP_INSTR_END;
1065 :
1066 : /* 0xe0 - 0xef ******************************************************/
1067 :
1068 45 : FD_VM_INTERP_INSTR_BEGIN(0xe6) /* FD_SBPF_OP_SREM32_IMM */
1069 45 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)imm==-1) ) ) goto sigfpeof;
1070 39 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)imm );
1071 39 : FD_VM_INTERP_INSTR_END;
1072 :
1073 54 : FD_VM_INTERP_INSTR_BEGIN(0xee) /* FD_SBPF_OP_SREM32_REG */
1074 54 : if( FD_UNLIKELY( !(int)reg_src ) ) goto sigfpe;
1075 42 : if( FD_UNLIKELY( ((int)reg_dst==INT_MIN) & ((int)reg_src==-1) ) ) goto sigfpeof;
1076 36 : reg[ dst ] = (ulong)(uint)( (int)reg_dst % (int)reg_src );
1077 36 : FD_VM_INTERP_INSTR_END;
1078 :
1079 : /* 0xf0 - 0xff ******************************************************/
1080 :
1081 42 : FD_VM_INTERP_INSTR_BEGIN(0xf6) /* FD_SBPF_OP_SREM64_IMM */
1082 42 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)(int)imm==-1L) ) ) goto sigfpeof;
1083 39 : reg[ dst ] = (ulong)( (long)reg_dst % (long)(int)imm );
1084 39 : FD_VM_INTERP_INSTR_END;
1085 :
1086 21 : FD_VM_INTERP_INSTR_BEGIN(0xf7) /* FD_SBPF_OP_HOR64 */
1087 21 : reg[ dst ] = reg_dst | (((ulong)imm) << 32);
1088 21 : FD_VM_INTERP_INSTR_END;
1089 :
1090 48 : FD_VM_INTERP_INSTR_BEGIN(0xfe) /* FD_SBPF_OP_SREM64_REG */
1091 48 : if( FD_UNLIKELY( !reg_src ) ) goto sigfpe;
1092 39 : if( FD_UNLIKELY( ((long)reg_dst==LONG_MIN) & ((long)reg_src==-1L) ) ) goto sigfpeof;
1093 36 : reg[ dst ] = (ulong)( (long)reg_dst % (long)reg_src );
1094 36 : FD_VM_INTERP_INSTR_END;
1095 :
1096 : /* SIMD-0377: JMP32
1097 : https://github.com/anza-xyz/sbpf/blob/v0.14.4/src/interpreter.rs#L480-L501
1098 :
1099 : 0x16 - 0xde ******************************************************/
1100 :
1101 1548 : FD_VM_INTERP_BRANCH_BEGIN(0x16_jmp32) /* FD_SBPF_OP_JEQ32_IMM */
1102 1533 : pc += fd_ulong_if( (uint)reg_dst==(uint)imm, offset, 0UL );
1103 1533 : FD_VM_INTERP_BRANCH_END;
1104 :
1105 630 : FD_VM_INTERP_BRANCH_BEGIN(0x1e_jmp32) /* FD_SBPF_OP_JEQ32_REG */
1106 624 : pc += fd_ulong_if( (uint)reg_dst==(uint)reg_src, offset, 0UL );
1107 624 : FD_VM_INTERP_BRANCH_END;
1108 :
1109 942 : FD_VM_INTERP_BRANCH_BEGIN(0x26_jmp32) /* FD_SBPF_OP_JGT32_IMM */
1110 933 : pc += fd_ulong_if( (uint)reg_dst>(uint)imm, offset, 0UL );
1111 933 : FD_VM_INTERP_BRANCH_END;
1112 :
1113 321 : FD_VM_INTERP_BRANCH_BEGIN(0x2e_jmp32) /* FD_SBPF_OP_JGT32_REG */
1114 318 : pc += fd_ulong_if( (uint)reg_dst>(uint)reg_src, offset, 0UL );
1115 318 : FD_VM_INTERP_BRANCH_END;
1116 :
1117 927 : FD_VM_INTERP_BRANCH_BEGIN(0x36_jmp32) /* FD_SBPF_OP_JGE32_IMM */
1118 918 : pc += fd_ulong_if( (uint)reg_dst>=(uint)imm, offset, 0UL );
1119 918 : FD_VM_INTERP_BRANCH_END;
1120 :
1121 318 : FD_VM_INTERP_BRANCH_BEGIN(0x3e_jmp32) /* FD_SBPF_OP_JGE32_REG */
1122 315 : pc += fd_ulong_if( (uint)reg_dst>=(uint)reg_src, offset, 0UL );
1123 315 : FD_VM_INTERP_BRANCH_END;
1124 :
1125 939 : FD_VM_INTERP_BRANCH_BEGIN(0x46_jmp32) /* FD_SBPF_OP_JSET32_IMM */
1126 930 : pc += fd_ulong_if( !!((uint)reg_dst & (uint)imm), offset, 0UL );
1127 930 : FD_VM_INTERP_BRANCH_END;
1128 :
1129 324 : FD_VM_INTERP_BRANCH_BEGIN(0x4e_jmp32) /* FD_SBPF_OP_JSET32_REG */
1130 321 : pc += fd_ulong_if( !!((uint)reg_dst & (uint)reg_src), offset, 0UL );
1131 321 : FD_VM_INTERP_BRANCH_END;
1132 :
1133 321 : FD_VM_INTERP_BRANCH_BEGIN(0x56_jmp32) /* FD_SBPF_OP_JNE32_IMM */
1134 318 : pc += fd_ulong_if( (uint)reg_dst!=(uint)imm, offset, 0UL );
1135 318 : FD_VM_INTERP_BRANCH_END;
1136 :
1137 324 : FD_VM_INTERP_BRANCH_BEGIN(0x5e_jmp32) /* FD_SBPF_OP_JNE32_REG */
1138 321 : pc += fd_ulong_if( (uint)reg_dst!=(uint)reg_src, offset, 0UL );
1139 321 : FD_VM_INTERP_BRANCH_END;
1140 :
1141 1248 : FD_VM_INTERP_BRANCH_BEGIN(0x66_jmp32) /* FD_SBPF_OP_JSGT32_IMM */
1142 1236 : pc += fd_ulong_if( (int)reg_dst>(int)imm, offset, 0UL );
1143 1236 : FD_VM_INTERP_BRANCH_END;
1144 :
1145 321 : FD_VM_INTERP_BRANCH_BEGIN(0x6e_jmp32) /* FD_SBPF_OP_JSGT32_REG */
1146 318 : pc += fd_ulong_if( (int)reg_dst>(int)reg_src, offset, 0UL );
1147 318 : FD_VM_INTERP_BRANCH_END;
1148 :
1149 627 : FD_VM_INTERP_BRANCH_BEGIN(0x76_jmp32) /* FD_SBPF_OP_JSGE32_IMM */
1150 621 : pc += fd_ulong_if( (int)reg_dst>=(int)imm, offset, 0UL );
1151 621 : FD_VM_INTERP_BRANCH_END;
1152 :
1153 318 : FD_VM_INTERP_BRANCH_BEGIN(0x7e_jmp32) /* FD_SBPF_OP_JSGE32_REG */
1154 315 : pc += fd_ulong_if( (int)reg_dst>=(int)reg_src, offset, 0UL );
1155 315 : FD_VM_INTERP_BRANCH_END;
1156 :
1157 627 : FD_VM_INTERP_BRANCH_BEGIN(0xa6_jmp32) /* FD_SBPF_OP_JLT32_IMM */
1158 621 : pc += fd_ulong_if( (uint)reg_dst<(uint)imm, offset, 0UL );
1159 621 : FD_VM_INTERP_BRANCH_END;
1160 :
1161 318 : FD_VM_INTERP_BRANCH_BEGIN(0xae_jmp32) /* FD_SBPF_OP_JLT32_REG */
1162 315 : pc += fd_ulong_if( (uint)reg_dst<(uint)reg_src, offset, 0UL );
1163 315 : FD_VM_INTERP_BRANCH_END;
1164 :
1165 621 : FD_VM_INTERP_BRANCH_BEGIN(0xb6_jmp32) /* FD_SBPF_OP_JLE32_IMM */
1166 615 : pc += fd_ulong_if( (uint)reg_dst<=(uint)imm, offset, 0UL );
1167 615 : FD_VM_INTERP_BRANCH_END;
1168 :
1169 318 : FD_VM_INTERP_BRANCH_BEGIN(0xbe_jmp32) /* FD_SBPF_OP_JLE32_REG */
1170 315 : pc += fd_ulong_if( (uint)reg_dst<=(uint)reg_src, offset, 0UL );
1171 315 : FD_VM_INTERP_BRANCH_END;
1172 :
1173 327 : FD_VM_INTERP_BRANCH_BEGIN(0xc6_jmp32) /* FD_SBPF_OP_JSLT32_IMM */
1174 324 : pc += fd_ulong_if( (int)reg_dst<(int)imm, offset, 0UL );
1175 324 : FD_VM_INTERP_BRANCH_END;
1176 :
1177 318 : FD_VM_INTERP_BRANCH_BEGIN(0xce_jmp32) /* FD_SBPF_OP_JSLT32_REG */
1178 315 : pc += fd_ulong_if( (int)reg_dst<(int)reg_src, offset, 0UL );
1179 315 : FD_VM_INTERP_BRANCH_END;
1180 :
1181 621 : FD_VM_INTERP_BRANCH_BEGIN(0xd6_jmp32) /* FD_SBPF_OP_JSLE32_IMM */
1182 615 : pc += fd_ulong_if( (int)reg_dst<=(int)imm, offset, 0UL );
1183 615 : FD_VM_INTERP_BRANCH_END;
1184 :
1185 318 : FD_VM_INTERP_BRANCH_BEGIN(0xde_jmp32) /* FD_SBPF_OP_JSLE32_REG */
1186 315 : pc += fd_ulong_if( (int)reg_dst<=(int)reg_src, offset, 0UL );
1187 315 : FD_VM_INTERP_BRANCH_END;
1188 :
1189 : /* FIXME: sigbus/sigrdonly are mapped to sigsegv for simplicity
1190 : currently but could be enabled if desired. */
1191 :
1192 : /* Note: sigtextbr is for sigtext errors that occur on branching
1193 : instructions (i.e., prefixed with FD_VM_INTERP_BRANCH_BEGIN).
1194 : We skip a repeat ic accumulation in FD_VM_INTERP_FAULT */
1195 :
1196 : /* FD_VM_INTERP_FAULT accumulates to ic and cu all non-faulting
1197 : instructions preceeding a fault generated by a non-branching
1198 : instruction. When a non-branching instruction faults, pc is at the
1199 : instruction and the number of non-branching instructions that have
1200 : not yet been reflected in ic and cu is:
1201 :
1202 : pc - pc0 + 1 - ic_correction
1203 :
1204 : as per the accounting described above. +1 to include the faulting
1205 : instruction itself.
1206 :
1207 : Note that, for a sigtext caused by a branch instruction, pc0==pc
1208 : (from the BRANCH_END) and ic_correction==0 (from the BRANCH_BEGIN)
1209 : such that the below does not change the already current values in
1210 : ic and cu. Thus it also "does the right thing" in both the
1211 : non-branching and branching cases for sigtext. The same applies to
1212 : sigsplit. */
1213 :
1214 0 : #define FD_VM_INTERP_FAULT \
1215 1635 : ic_correction = pc - pc0 + 1UL - ic_correction; \
1216 1635 : ic += ic_correction; \
1217 1635 : if ( FD_UNLIKELY( ic_correction > cu ) ) err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; \
1218 1635 : cu -= fd_ulong_min( ic_correction, cu )
1219 :
1220 87 : sigtext: err = FD_VM_ERR_EBPF_EXECUTION_OVERRUN; FD_VM_INTERP_FAULT; goto interp_halt;
1221 42 : sigtextbr: err = FD_VM_ERR_EBPF_CALL_OUTSIDE_TEXT_SEGMENT; /* ic current */ /* cu current */ goto interp_halt;
1222 3 : sigstack: err = FD_VM_ERR_EBPF_CALL_DEPTH_EXCEEDED; /* ic current */ /* cu current */ goto interp_halt;
1223 1176 : sigill: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; FD_VM_INTERP_FAULT; goto interp_halt;
1224 27 : sigillbr: err = FD_VM_ERR_EBPF_UNSUPPORTED_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1225 18 : siginv: err = FD_VM_ERR_EBPF_INVALID_INSTRUCTION; /* ic current */ /* cu current */ goto interp_halt;
1226 198 : sigsegv: err = fd_vm_generate_access_violation( vm->segv_vaddr, vm->sbpf_version ); FD_VM_INTERP_FAULT; goto interp_halt;
1227 801 : sigcost: err = FD_VM_ERR_EBPF_EXCEEDED_MAX_INSTRUCTIONS; /* ic current */ cu = 0UL; goto interp_halt;
1228 0 : sigsyscall: err = FD_VM_ERR_EBPF_SYSCALL_ERROR; /* ic current */ /* cu current */ goto interp_halt;
1229 138 : sigfpe: err = FD_VM_ERR_EBPF_DIVIDE_BY_ZERO; FD_VM_INTERP_FAULT; goto interp_halt;
1230 36 : sigfpeof: err = FD_VM_ERR_EBPF_DIVIDE_OVERFLOW; FD_VM_INTERP_FAULT; goto interp_halt;
1231 6321 : sigexit: /* err current */ /* ic current */ /* cu current */ goto interp_halt;
1232 :
1233 0 : #undef FD_VM_INTERP_FAULT
1234 :
1235 8847 : interp_halt:
1236 :
1237 : /* Pack the unpacked execution state into vm to give a precise view of
1238 : the execution when the vm halted. */
1239 :
1240 8847 : vm->pc = pc;
1241 8847 : vm->ic = ic;
1242 8847 : vm->cu = cu;
1243 8847 : vm->frame_cnt = frame_cnt;
1244 :
1245 8847 : # undef FD_VM_INTERP_STACK_PUSH
1246 :
1247 8847 : # undef FD_VM_INTERP_BRANCH_END
1248 8847 : # undef FD_VM_INTERP_BRANCH_BEGIN
1249 :
1250 8847 : # undef FD_VM_INTERP_INSTR_END
1251 8847 : # undef FD_VM_INTERP_INSTR_BEGIN
1252 8847 : # undef FD_VM_INTERP_INSTR_EXEC
1253 :
1254 8847 : # if defined(__clang__)
1255 8847 : # pragma clang diagnostic pop
1256 8847 : # endif
1257 :
1258 8847 : # if defined(__GNUC__)
1259 8847 : # pragma GCC diagnostic pop
1260 8847 : # endif
1261 :
1262 : /* Agave/JIT CU model analysis (and why we are conformant!):
1263 :
1264 : The Agave JIT employs a similar strategy of accumulating instructions
1265 : in a linear run and processing them at the start of a new linear
1266 : run/branch (side note: the JIT treats the LDQ instruction as a "branch"
1267 : that jumps pc + 2).
1268 :
1269 : In what is assumed to be an act of register conservation, the JIT
1270 : uses a catch-all "instruction meter" (IM) register (REGISTER_INSTRUCTION_METER)
1271 : that represents two different interpretations of the question
1272 : "how many instructions can I execute?".
1273 :
1274 : The IM, depending on where we are in the execution, either represents:
1275 : 1. IM => The number of instructions remaining before exhausting CU
1276 : budget. This is analagous to vm->cu in our interpreter.
1277 : 2. IM' => The last pc you can execute in the current linear run before
1278 : exhausting CU budget. Mathematically, IM' = IM + pc0
1279 : where pc0, just like our definition, is the start of the linear run.
1280 :
1281 : Note: IM' can go past the actual basic block/segment. In-fact,
1282 : it typically does, and implies we can execute the full block without
1283 : exhausting CU budget (reminder that LDQ is treated as a branch).
1284 :
1285 : By default, the IM' form is used during execution. The IM form is used:
1286 : - (transiently) during the processing of a branch instruction
1287 : - in post-VM cleanup (updates EbpfVm::previous_instruction_meter).
1288 :
1289 : When a branch instruction is encountered, the JIT checks
1290 : for CU exhaustion with pc > IM', and throws an exception if so. This is valid,
1291 : because as described above, IM' is the largest PC you can reach.
1292 :
1293 : If we haven't exhausted our CU limit, it updates IM':
1294 : 1. IM = IM' - (pc + 1) # Note that IM' at this point is IM + pc0',
1295 : # where pc0' is the start of the current linear run.
1296 : 2. IM' = IM + pc0 # pc0 is the start of the new linear run (typically the target pc)
1297 :
1298 : Code (that does the above in one ALU instruction):
1299 : https://github.com/solana-labs/rbpf/blob/v0.8.5/src/jit.rs#L891
1300 :
1301 :
1302 : ### How does this relate to our interpreter?
1303 :
1304 : This process is similar to FD_VM_INTERP_BRANCH_BEGIN.
1305 : We just deal with the IM form throughout (with vm->cu and ic_correction).
1306 : If we break down step 1 from above with what we know about IM and IM',
1307 : we get the following:
1308 : 1. IM = IM' - (pc + 1)
1309 : IM = (IM + pc0') - (pc + 1)
1310 : IM = IM + (pc0' - (pc + 1))
1311 : IM = IM - ((pc + 1) - pc0')
1312 : IM = IM - ic_correction
1313 : Here, ((pc + 1) - pc0') is the number of instrutions executed in the current
1314 : linear run. This is the same as our ic_correction(*) in FD_VM_INTERP_BRANCH_BEGIN.
1315 :
1316 : If we replace IM with cu, this effectively becomes the
1317 : cu -= ic_correction
1318 : line in FD_VM_INTERP_BRANCH_BEGIN.
1319 :
1320 : (*) Note: ic_correction (also) takes two forms. It is either the instruction
1321 : accumulator or the number of instructions executed in the current linear run.
1322 : It (transiently) takes the latter form during FD_VM_INTERP_BRANCH_BEGIN and
1323 : FD_VM_INTERP_FAULT, and the former form otherwise.
1324 : */
1325 :
1326 : /* (WIP) Precise faulting and the Agave JIT:
1327 :
1328 : Since the cost model is a part of consensus, we need to conform with the Agave/JIT
1329 : cost model 1:1. To achieve that, our faulting model also needs to match precisely. This
1330 : section covers the various faults that the respective VMs implement and how they match.
1331 :
1332 : # Normal VM exit (sigexit):
1333 : VM exit instruction entrypoint: https://github.com/solana-labs/rbpf/blob/12237895305ab38514be865ebed6268553e4f589/src/jit.rs#L698-L708
1334 :
1335 : Pseudocode (with FD semantics):
1336 : ```
1337 : # pc is at the exit instruction
1338 : # pc0 is the start of the current linear run
1339 : if (frame_cnt == 0) {
1340 : goto sigexit;
1341 : }
1342 : ...
1343 :
1344 : sigexit:
1345 : if IM' <= pc {
1346 : goto sigcost;
1347 : } else {
1348 : goto interp_halt;
1349 : }
1350 : ```
1351 :
1352 : Breaking down the IM' < pc check:
1353 : - IM' = IM + pc0
1354 : - pc = ic + pc0, where (ic + 1) is the number of instructions executed in the current linear run
1355 :
1356 : IM' <= pc
1357 : IM + pc0 <= ic + pc0
1358 : IM <= ic
1359 : IM <= pc - pc0
1360 : IM < pc - pc0 + 1 # all unsigned integers
1361 : IM < ic_correction
1362 :
1363 : This is analagous to the ic_correction>cu check in VM_INTERP_BRANCH_BEGIN.
1364 :
1365 : # (TODO) Text Overrun (sigtext/sigsplit):
1366 :
1367 : */
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